Feature | Description | Implementation |
---|---|---|
EtherNet/IP Device Class | Adapter | Yes |
Scanner | No | |
Device Profile Examples | Generic Device (0x2B) General Purpose Discrete I/O Device (0x07) | Yes |
Device Configuration | EDS File | Yes |
Connection Types | Exclusive Owner | Yes |
Input Only | Yes | |
Listen Only | Yes | |
Connection Trigger Types | Cyclic | Yes |
Application Triggered | No | |
Change of State | Yes | |
Maximum Connections | Class 1 | 8 |
Class 3 | 32 | |
Explicit Messaging | Connected | Yes |
Unconnected | Yes | |
Standard Objects | Identity Object (0x01) | Yes |
Message Router Object (0x02) | Yes | |
Assembly Object (0x04) | Yes | |
Connection Manager Object (0x06) | Yes | |
Time Sync Object (0x43) | Yes | |
Device Level Ring Object (0x47) | Yes | |
QoS Object (0x48) | Yes | |
TCP/IP Interface Object (0xF5) | Yes | |
Ethernet Link Object (0xF6) | Yes | |
LLDP Management Object (0x109) | Yes | |
LLDP Data Table Object (0x10A) | Yes | |
Supported Elementary Data Types | BOOL | Yes |
SINT | Yes | |
INT | Yes | |
DINT | Yes | |
LINT | Yes | |
USINT | Yes | |
UINT | Yes | |
UDINT | Yes | |
ULINT | Yes | |
REAL | Yes | |
LREAL | Yes | |
STRING | Planned | |
BYTE | Yes | |
WORD | Yes | |
DWORD | Yes | |
LWORD | Yes | |
STRING2 | Planned | |
SHORT_STRING | Yes | |
EPATH | Yes | |
Supported Constructed Data Types | Formal Array | Yes |
IP Addressing Modes | DHCP | Yes |
BOOTP | Yes | |
Static | Yes | |
VLAN tagging | IEEE802.1Q, 3 bit PCP (8 levels) | Yes |
Switch queues | 4 | |
Statistics | Media counters supported per interface (dual port switch) | Yes |
Interface counters supported per interface | Yes | |
CIP Sync (PTP/IEEE1588) | Supports Drives Profile : E2E clock | Yes |
PTP over UDP | Yes | |
Transparent Clock supported | Yes | |
Ordinary Clock supported | Yes | |
Single and Two Step Clock supported | Yes | |
Supported Network Features | Link Layer Discovery Protocol (LLDP) | Yes |
Device Level Ring (DLR) | Yes | |
Address Conflict Detection (ACD) | Yes | |
Quality of Service (QoS) | Yes | |
CIP Reset Services | Identity Object Reset Services of Typ 0, 1, and 2 | |
Device Level Ring (DLR) | Beacon based | Yes |
Self configuring | Yes | |
Min. beacon interval | 200 µs | |
Min. beacon timeout | 400 µs | |
Baud Rate | 100 Mbit/s | Yes |
10 Mbit/s | Yes | |
Duplex Mode | Half | Yes |
Full | Yes | |
Auto Negotiation | Yes | |
Conformance | ODVA CT20 |
Feature | Description | Setting |
---|---|---|
Process Data Image | max. I/O assembly (size) | 1480 Bytes |
Connection Trigger Types and Cycle Times | Cyclic (Class 1) | 1 ms |
Change of State | 1 ms | |
Bridge Delay | Min Bridge Delay | 2.71 μs |
Max Bridge Delay | 3.19 μs |
The table below lists resource requirement for the Generic Device (0x2B) example. Please note that this application has only a limited functional scope that does not contain the basic web server that is include with the example code. More complex application code will result in higher ROM and RAM requirements.
Release build | Debug build | |
---|---|---|
Code | 276 kB | 399 kB |
RO Data | 72 KB | 74 KB |
RW Data | 468 KB | 468 KB |
QuickConnect is an optional functionality that may be enabled on a node-by-node basis. When enabled, QuickConnect will allow EtherNet/IP devices to quickly power up and join an EtherNet/IP network.
QuickConnect connection time is comprised of several key time phases. One factor of the QuickConnect connection time is the devices power-up time. Another factor is the amount of time it takes a controller to detect the newly attached device and send a Forward Open request to start the connection process.
QuickConnect targets 500 ms as the time between initial power-up and the establisment of IO connections.
QuickConnect measurements have been performed on the Texas Instruments LP-AM243 LaunchPad™ development kit and the TMDS64EVM AM64x evaluation module with an attached TMDS64DC01EVM AM64x IO-link and high-speed breakout card.
For the measurements an oscilloscope is connected to a GPIO pin on the particular board which was set to high on application start and reset to low on the first Forward Open request. The measurements were triggered by the MCU_PORz signals available on the evaluation modules. The power-up time is the time interval between the MCU_PORz signal and application start. The connection establishment is the time interval between application start and the detection of the Forward Open request.
Evaluation Module | MCU_PORz Signal | GPIO | Pin |
---|---|---|---|
LP-AM243 | Header J6 pin 56 | GPIO1_21 | Header J7 pin 57 |
TMDS64EVM | Safety connector pin 24 | GPIO0_41 | TMDS64DC01EVM, header J8 pin 24 |
To enable GPIO control the example application shipped with the EtherNet/IP Adapter software is extended by two functions:
GPIO_init
and GPIO_set
are called in App.c
at application start and later in the Forward Open callback function.
The QuickConnect controller device is emulated by a Python script that triggers the connection establishment upon detection of ARP announce frames.
ARP announce frame received | Request of TCP connection | Request of Register Session | Forward Open request |
---|---|---|---|
0.0 ms | 2.494 ms | 15.215 ms | 26.398 ms |
Evaluation Module | Application start | Forward Open Request |
---|---|---|
LP-AM243 | 252 ms | 318 ms |
TMDS64EVM | 180 ms | 269 ms |