Feature | Description | Implementation |
Distributed Clocks | By using distributed clocks the EtherCAT real-time Ethernet protocol is able to synchronize the time in all local bus devices within a very narrow tolerance range. | Yes |
Object Dictionary | Freely definable, only limited by available resources. | Yes |
CiA 402 | This profile standardizes the functional behavior of controllers for servo drives, frequency inverters, and stepper motors. | Yes |
Mailbox Queue | Mailbox services will be stored in a queue. Mailbox services can be processed in parallel. | Yes |
AoE | ADS over EtherCAT service support. | Yes |
CoE | CANopen over EtherCAT service support. | Yes |
Complete Access support | Accessing all entries of an object with one SDO service is supported. | Yes |
Segmented SDO support | Segmented SDO service is supported. | Yes |
SDO Response Interface | If a SDO response cannot be generated immediately, return ABORTIDX_WORKING. | Yes |
Diagnosis support | Diagnosis messages are supported. | Yes |
Emergency support | Emergency messages are supported. | Yes |
VoE | Vendor Specific Protocol over EtherCAT service support. | No |
SoE | Sercos over EtherCAT service support. | No |
EoE | Ethernet over EtherCAT service support. | Yes |
FoE | File access over EtherCAT service support. | Yes |
OP State requires process data | Transition from SafeOP to OP State requires process data. | Yes |
Explicit device ID | Explicit device ID requests are handled. | No |
Error Counters | RX Invalid Frame Counter Port 0/1 | Yes |
RX ERR Counter Port 0/1 | Yes |
Forwarded Error Counter Port 0/1 | Yes |
EtherCAT Processing Unit Error Counter Port 0/1 | Yes |
Feature | Detail | Value |
Fieldbus Memory Management Units (FMMU) | Convert logical addresses into physical addresses by means of internal address mapping | 4 |
SYNC Manager | Insure consistent and secure data exchange between EtherCAT master and local application of slave device | 4 |
Processdata | Maximum Input | 1024 Bytes |
Maximum Output | 1024 Bytes |
Cycle Time | Free run | 31.25 µs |
DC mode | 50 µs |
Distributed Clocks | Accuracy | 64-bit |
SYNC0 | Generation single shot and cyclic mode support |
SYNC1 | SYNC1 cycle time multiple of SYNC0 cycle time |
SYNC Jitter (Cycle Time 50 µs) | 20ns |
Latency | Process path (333 MHz) | Average = 290ns, Max = 300ns |
Process path (200 MHz) | Average = 425ns, Max = 430ns |
Auto forward path (333 MHz) | Average = 290ns, Max = 310ns |
Auto forward path (200 MHz) | Average = 418ns, Max = 420ns |
Cable redundancy support | | Yes |
CPU Load | Due to the architecture of the ETG stack, the CPU load cannot be reliably measured | n.a. |