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This file contains the structure definitions and function prototypes of the CPSW PHY driver. More...
#include <ti/csl/csl_types.h>
#include "cpsw_mdio.h"
#include "cpsw_types.h"
#include "cpsw_macport.h"
Data Structures | |
struct | CpswPhy_GenericInArgs_s |
Generic input args. More... | |
struct | CpswPhy_GetModeOutArgs_s |
Output args for CPSW_PHY_IOCTL_PHY_GET_MODE command. More... | |
struct | CpswPhy_SetModeInArgs |
Input args for CPSW_PHY_IOCTL_PHY_SET_MODE command. More... | |
struct | CpswPhy_ComplianceTestInArgs_s |
Input args for CPSW_PHY_IOCTL_RUN_COMPLIANCE_TEST command. More... | |
struct | CpswPhy_ReadRegInArgs_s |
Input args for CPSW_PHY_IOCTL_READ_REG_EXT command. More... | |
struct | CpswPhy_WriteRegInArgs_s |
Input args for CPSW_PHY_IOCTL_WRITE_REG_EXT command. More... | |
struct | CpswPhy_Clause45ReadRegInArgs_s |
Input args for CPSW_PHY_IOCTL_READ_CLAUSE45_REG command. More... | |
struct | CpswPhy_Clause45WriteRegInArgs_s |
Input args for CPSW_PHY_IOCTL_WRITE_CLAUSE45_REG command. More... | |
struct | CpswPhy_Version_s |
PHY version (ID) More... | |
struct | CpswPhy_FsmTimeoutConfig_s |
PHY State-Machine time-out values. More... | |
struct | CpswPhy_Config_s |
PHY configuration parameters. More... | |
Macros | |
#define | CPSW_PHY_EXTENDED_CFG_SIZE_MAX (128U) |
Max extended configuration size, arbitrarily chosen. | |
#define | CPSW_PHY_FSM_TICK_PERIOD_MS (100U) |
CPSW Phy State Machine tick period. | |
#define | CPSW_PHY_INVALID_PHYADDR (~0U) |
Invalid PHY address indicator. More... | |
#define | CPSW_PHY_DEVID_AUTODETECT (~0U) |
Device ID is detected at runtime from PHYIDR1 and PHYIDR2. | |
#define | CPSW_PHY_USE_DEFAULT (~0U) |
Indicates the driver that default value is to be used. | |
#define | CPSW_PHY_NWAY_AUTOMDIX_ENABLE (1U << 15) |
Auto MDIX enable. | |
#define | CPSW_PHY_MIIMDIO_MDIXFLIP (1U << 28) |
Auto MDIX enable. | |
#define | CPSW_PHY_EVENT_NOCHANGE (0U) |
No change from previous status. | |
#define | CPSW_PHY_EVENT_LINKDOWN (1U) |
Link down event. | |
#define | CPSW_PHY_EVENT_LINKUP (2U) |
NLink (or re-link) event. | |
#define | CPSW_PHY_EVENT_PHYERROR (3U) |
No PHY connected. | |
#define | CPSW_PHY_EVENT_LPBK (4U) |
PHY LPBK. | |
#define | CPSW_PHY_IS_ADDR_VALID(addr) ((addr) <= 31U) |
Check if PHY address is valid (0 - 31) | |
#define | CPSW_PHY_PUBLIC_IOCTL(x) (CPSW_IOCTL_PHY_BASE | CPSW_IOCTL_MIN(x)) |
Helper macro to create IOCTL commands for host port submodule. | |
Enumerations | |
enum | CpswPhy_Ioctl_e { CPSW_PHY_IOCTL_PHY_TICK = CPSW_PHY_PUBLIC_IOCTL(0U), CPSW_PHY_IOCTL_PHY_GET_ID = CPSW_PHY_PUBLIC_IOCTL(1U), CPSW_PHY_IOCTL_PHY_GET_SUPPORTED_MODES = CPSW_PHY_PUBLIC_IOCTL(2U), CPSW_PHY_IOCTL_PHY_GET_LOOPBACK_STATE = CPSW_PHY_PUBLIC_IOCTL(3U), CPSW_PHY_IOCTL_PHY_GET_LINK_STATE = CPSW_PHY_PUBLIC_IOCTL(4U), CPSW_PHY_IOCTL_PHY_GET_LINK_MODE = CPSW_PHY_PUBLIC_IOCTL(5U), CPSW_PHY_IOCTL_PHY_SET_MODE = CPSW_PHY_PUBLIC_IOCTL(6U), CPSW_PHY_IOCTL_PHY_RESET = CPSW_PHY_PUBLIC_IOCTL(7U), CPSW_PHY_IOCTL_RUN_COMPLIANCE_TEST = CPSW_PHY_PUBLIC_IOCTL(8U), CPSW_PHY_IOCTL_PHY_IS_ALIVE = CPSW_PHY_PUBLIC_IOCTL(9U), CPSW_PHY_IOCTL_PHY_IS_LINKED = CPSW_PHY_PUBLIC_IOCTL(10U), CPSW_PHY_IOCTL_READ_REG = CPSW_PHY_PUBLIC_IOCTL(11U), CPSW_PHY_IOCTL_WRITE_REG = CPSW_PHY_PUBLIC_IOCTL(12U), CPSW_PHY_IOCTL_READ_REG_EXT = CPSW_PHY_PUBLIC_IOCTL(13U), CPSW_PHY_IOCTL_WRITE_REG_EXT = CPSW_PHY_PUBLIC_IOCTL(14U), CPSW_PHY_IOCTL_READ_CLAUSE45_REG = CPSW_PHY_PUBLIC_IOCTL(15U), CPSW_PHY_IOCTL_WRITE_CLAUSE45_REG = CPSW_PHY_PUBLIC_IOCTL(16U), CPSW_PHY_IOCTL_PRINT_REGS = CPSW_PHY_PUBLIC_IOCTL(17U) } |
PHY IOCTL commands. More... | |
This file contains the structure definitions and function prototypes of the CPSW PHY driver.