The example demonstrates the PMIC watchdog in Q&A mode which will generate a warm reset when the core fails to send the answers to the watchdog. The application configures the GPIO pins and the watchdog in the PMIC to send and receive the Q&A signals. It services the watchdog for few iterations and stops sending the answers. Then, the core will wait for sometime based on the reset threshold value configured in the watchdog for the warm reset to occur. If the warm reset occurs, the test passes else fails.
Parameter | Value |
---|---|
CPU + OS | mcu-r5fss0-0 freertos |
Toolchain | ti-arm-clang |
Board | am62px-sk |
Example folder | examples/drivers/pmic/pmic_qa_watchdog_reset |
python uart_uniflash.py -p /dev/ttyUSB0 --cfg=../../examples/drivers/pmic/pmic_qa_watchdog_reset/am62px-sk/default_pmic_qa_watchdog_reset_hs_fs.cfg
Shown below is a sample output when the application is run,