This file contains generated pre compile configuration file for MCU MCAL driver.
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Pre-compile switches for enabling/disabling DEM events
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| #define | DemConf_DemEventParameter_MCU_DEM_NO_EVENT (0xFFFFU) |
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| #define | MCU_DEM_NO_EVENT DemConf_DemEventParameter_MCU_DEM_NO_EVENT |
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| #define | MCU_E_CLOCK_FAILURE (MCU_DEM_NO_EVENT) |
| | Hardware failed. More...
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| #define | MCU_PERFORM_RESET_MASK ((uint32) 0x00060000U) |
| | Reset Reason Mask. More...
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| #define | MCU_PERFORM_RESET_CLEAR_MASK ((uint32) 0xFFFFFFFFU) |
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| #define | MCU_RST_SRC_STAT_CLEAR ((uint32) 0x190B0BU) |
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| #define | SW_MCU_WARM_RST ((uint32) 0x1U) |
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| #define | SW_MAIN_WARM_RST ((uint32) 0x2U) |
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| #define | SW_MAIN_POR ((uint32) 0x8U) |
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| #define | MCU_RESETZ ((uint32) 0x100U) |
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| #define | WARM_OUT_RST ((uint32) 0x10000U) |
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| #define | COLD_OUT_RST ((uint32) 0x80000U) |
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| #define | DEBUG_RST_OCCURED ((uint32) 0x100000U) |
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| #define | rstaddr ((LLD_wkup_ctrl_mmr_cfg0Regs*)0x43000000U) |
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| #define | MCU_ERRORRST_MASK ((Mcu_RawResetType)0xFFFF0000U) |
| | Reset Reason Error Mask. More...
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| |
| #define | MCU_UTILS_ARRAYSIZE(array) |
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| #define | MCU_RESET_STATUS_NUMBER ((uint8)0x6) |
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| #define | ARRAYSIZE(array) |
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| #define | McuConf_McuModeSettingConf_McuModeSettingConf_0 (0U) |
| | Pre Compile config macro name. More...
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| #define | McuConf_McuClockSettingConfig_MCU_MCAN0 (0U) |
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| #define | McuConf_McuClockSettingConfig_MCU_MCAN1 (1U) |
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| #define | McuConf_McuClockSettingConfig_MAIN_RTI_0 (2U) |
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| #define | McuConf_McuResetReasonConf_MCU_POWER_ON_RESET (0U) |
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| #define | McuConf_McuResetReasonConf_MCU_WATCHDOG_RESET (1U) |
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| #define | McuConf_McuResetReasonConf_MCU_COLD_SW_RESET (2U) |
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| #define | McuConf_McuResetReasonConf_MCU_SW_RESET (3U) |
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| #define | McuConf_McuResetReasonConf_MCU_DEBUG_RESET (4U) |
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| #define | McuConf_McuResetReasonConf_MCU_RESET_UNDEFINED (5U) |
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| #define | McuConf_McuResetReasonConf_MCU_RESET_CLEAR (6U) |
| |
| enum | Mcu_ResetType {
MCU_POWER_ON_RESET = 0,
MCU_WATCHDOG_RESET,
MCU_COLD_SW_RESET,
MCU_SW_RESET,
MCU_DEBUG_RESET,
MCU_RESET_UNDEFINED,
MCU_RESET_CLEAR
} |
| | This is the type of the reset enumerator containing the subset of reset types.
It is not required that all reset types are supported by hardware. More...
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| |
| enum | Mcu_DomainType { MCU,
MAIN,
WKUP
} |
| |
| enum | Mcu_ModuleName {
Adc,
Gpio,
Timer,
Rti,
Mcspi,
Ecap,
Ospi,
Epwm,
Cddipc,
Mcan,
Eth
} |
| |
| enum | Mcu_ClkModuleIdType {
MCU_CLKSRC_MODULE_ID_MCU_ADC0 = 0,
MCU_CLKSRC_MODULE_ID_MCU_ADC1 = 1,
MCU_CLKSRC_MODULE_ID_MCU_ETH0 = 18,
MCU_CLKSRC_MODULE_ID_MAIN_ETH0 = 19,
MCU_CLKSRC_MODULE_ID_WKUP_GPIO0 = 113,
MCU_CLKSRC_MODULE_ID_WKUP_GPIO1 = 114,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO0 = 105,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO1 = 106,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO2 = 107,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO3 = 108,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO4 = 109,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO5 = 110,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO6 = 111,
MCU_CLKSRC_MODULE_ID_MAIN_GPIO7 = 112,
MCU_CLKSRC_MODULE_ID_MCU_TIMER0 = 35,
MCU_CLKSRC_MODULE_ID_MCU_TIMER1 = 71,
MCU_CLKSRC_MODULE_ID_MCU_TIMER2 = 72,
MCU_CLKSRC_MODULE_ID_MCU_TIMER3 = 73,
MCU_CLKSRC_MODULE_ID_MCU_TIMER4 = 74,
MCU_CLKSRC_MODULE_ID_MCU_TIMER5 = 75,
MCU_CLKSRC_MODULE_ID_MCU_TIMER6 = 76,
MCU_CLKSRC_MODULE_ID_MCU_TIMER7 = 77,
MCU_CLKSRC_MODULE_ID_MCU_TIMER8 = 78,
MCU_CLKSRC_MODULE_ID_MCU_TIMER9 = 79,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER0 = 49,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER1 = 50,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER2 = 51,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER3 = 52,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER4 = 53,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER5 = 54,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER6 = 55,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER7 = 57,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER8 = 58,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER9 = 59,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER10 = 60,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER11 = 62,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER12 = 63,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER13 = 64,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER14 = 65,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER15 = 66,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER16 = 67,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER17 = 68,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER18 = 69,
MCU_CLKSRC_MODULE_ID_MAIN_TIMER19 = 70,
MCU_CLKSRC_MODULE_ID_MCU_RTI0 = 262,
MCU_CLKSRC_MODULE_ID_MCU_RTI1 = 263,
MCU_CLKSRC_MODULE_ID_MAIN_RTI0 = 252,
MCU_CLKSRC_MODULE_ID_MAIN_RTI1 = 253,
MCU_CLKSRC_MODULE_ID_MAIN_RTI24 = 254,
MCU_CLKSRC_MODULE_ID_MAIN_RTI25 = 255,
MCU_CLKSRC_MODULE_ID_MAIN_RTI16 = 256,
MCU_CLKSRC_MODULE_ID_MAIN_RTI15 = 257,
MCU_CLKSRC_MODULE_ID_MAIN_RTI28 = 258,
MCU_CLKSRC_MODULE_ID_MAIN_RTI29 = 259,
MCU_CLKSRC_MODULE_ID_MAIN_RTI30 = 260,
MCU_CLKSRC_MODULE_ID_MAIN_RTI31 = 261,
MCU_CLKSRC_MODULE_ID_MCU_MCSPI0 = 274,
MCU_CLKSRC_MODULE_ID_MCU_MCSPI1 = 275,
MCU_CLKSRC_MODULE_ID_MCU_MCSPI2 = 276,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI0 = 266,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI1 = 267,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI2 = 268,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI3 = 269,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI4 = 270,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI5 = 271,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI6 = 272,
MCU_CLKSRC_MODULE_ID_MAIN_MCSPI7 = 273,
MCU_CLKSRC_MODULE_ID_MAIN_ECAP0 = 80,
MCU_CLKSRC_MODULE_ID_MAIN_ECAP1 = 81,
MCU_CLKSRC_MODULE_ID_MAIN_ECAP2 = 82,
MCU_CLKSRC_MODULE_ID_MCU_OSPI0 = 103,
MCU_CLKSRC_MODULE_ID_MCU_OSPI1 = 104,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM0 = 83,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM1 = 84,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM2 = 85,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM3 = 86,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM4 = 87,
MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM5 = 88,
MCU_CLKSRC_MODULE_ID_MAILBOX0 = 214,
MCU_CLKSRC_MODULE_ID_MCU_MCAN0 = 172,
MCU_CLKSRC_MODULE_ID_MCU_MCAN1 = 173,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN0 = 156,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN1 = 158,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN2 = 160,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN3 = 161,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN4 = 162,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN5 = 163,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN6 = 164,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN7 = 165,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN8 = 166,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN9 = 167,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN10 = 168,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN11 = 169,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN12 = 170,
MCU_CLKSRC_MODULE_ID_MAIN_MCAN13 = 171
} |
| | Clock source config modules id enum. More...
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| |
| enum | Mcu_ClkSourceIdType {
MCU_CLKSRC_0 = 0,
MCU_CLKSRC_1,
MCU_CLKSRC_2,
MCU_CLKSRC_3,
MCU_CLKSRC_4,
MCU_CLKSRC_5,
MCU_CLKSRC_6,
MCU_CLKSRC_MAX
} |
| | This is the type of the clock source in clock tree that is selectable for peripheral. Please see TRM to map clock source to module. More...
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| |
| enum | Mcu_PllStatusType { MCU_PLL_LOCKED = 0,
MCU_PLL_UNLOCKED,
MCU_PLL_STATUS_UNDEFINED
} |
| | This is a status value returned by the function Mcu_GetPllStatus() of the MCU module. More...
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| |
| enum | Mcu_RamStateType { MCU_RAMSTATE_INVALID,
MCU_RAMSTATE_VALID
} |
| | Enumeration of ranstate queried by Mcu_GetRamState() More...
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| enum | Mcu_PllSourceIdType { MCU_CLKSRC_DPLL = 0,
MCU_CLKSRC_APLL
} |
| | Type for PLL source selection. More...
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| typedef uint32 | clkId |
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| typedef uint32 uint64 | ParentId |
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| const struct Mcu_ConfigType_s | McuModuleConfiguration_0 |
| | MCU Configuration struct declaration. More...
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| typedef | P2CONST (Mcu_RamSectionConfigType, AUTOMATIC, MCU_CONFIG_DATA) Mcu_RamConfigPtrType |
| | Pointer to RamConfig structure. More...
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| typedef | P2CONST (Mcu_PllConfigType, AUTOMATIC, MCU_CONFIG_DATA) Mcu_PllConfigPtrType |
| | Pointer to PLL Config structure. More...
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| typedef | P2FUNC (Std_ReturnType, AUTOMATIC, Mcu_CBKFunctionPtrType)(uint32 moduleId |
| | Pointer to Callback function. More...
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| typedef | P2FUNC (void, AUTOMATIC, Mcu_SoftResetCBKFunctionPtrType)(void) |
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| | CONST (Mcu_ResetStatusMap, MCU_CONST) Mcu_ResetStatusMapTbl[MCU_RESET_STATUS_NUMBER] |
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| | CONST (Mcu_ResetInfo, MCU_CONST) Mcu_ResetInfoTbl |
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1.8.20