109 #define MCU_VARIANT_POST_BUILD (STD_ON)
115 #define MCU_CFG_ID (0x1U)
127 #define MCU_CFG_MAJOR_VERSION (10U)
129 #define MCU_CFG_MINOR_VERSION (0U)
131 #define MCU_CFG_PATCH_VERSION (0U)
143 #define MCU_DEV_ERROR_DETECT (STD_ON)
145 #define MCU_GET_RAM_STATE_API (STD_OFF)
147 #define MCU_INIT_CLOCK_API (STD_ON)
149 #define MCU_PERFORM_RESET_API (STD_ON)
151 #define MCU_GET_VERSION_INFO_API (STD_ON)
153 #define MCU_INIT_RAM_API (STD_OFF)
155 #define MCU_NO_PLL (STD_OFF)
157 #define MCU_REGISTER_READBACK_API (STD_OFF)
166 #define DemConf_DemEventParameter_MCU_DEM_NO_EVENT (0xFFFFU)
167 #define MCU_DEM_NO_EVENT DemConf_DemEventParameter_MCU_DEM_NO_EVENT
170 #ifndef MCU_E_CLOCK_FAILURE
172 #define MCU_E_CLOCK_FAILURE (MCU_DEM_NO_EVENT)
176 #define MCU_PERFORM_RESET_MASK ((uint32) 0x00060000U)
177 #define MCU_PERFORM_RESET_CLEAR_MASK ((uint32) 0xFFFFFFFFU)
178 #define MCU_RST_SRC_STAT_CLEAR ((uint32) 0x190B0BU)
179 #define SW_MCU_WARM_RST ((uint32) 0x1U)
180 #define SW_MAIN_WARM_RST ((uint32) 0x2U)
181 #define SW_MAIN_POR ((uint32) 0x8U)
182 #define MCU_RESETZ ((uint32) 0x100U)
183 #define WARM_OUT_RST ((uint32) 0x10000U)
184 #define COLD_OUT_RST ((uint32) 0x80000U)
185 #define DEBUG_RST_OCCURED ((uint32) 0x100000U)
187 #define rstaddr ((LLD_wkup_ctrl_mmr_cfg0Regs*)0x43000000U)
190 #define MCU_ERRORRST_MASK ((Mcu_RawResetType)0xFFFF0000U)
192 #define MCU_UTILS_ARRAYSIZE(array) ((sizeof (array) / \
193 sizeof ((array)[0])))
195 #define MCU_RESET_STATUS_NUMBER ((uint8)0x6)
197 #define ARRAYSIZE(array) ((sizeof (array) / \
198 sizeof ((array)[0])))
215 #define McuConf_McuModeSettingConf_McuModeSettingConf_0 (0U)
224 #define McuConf_McuClockSettingConfig_MCU_MCAN0 (0U)
225 #define McuConf_McuClockSettingConfig_MCU_MCAN1 (1U)
226 #define McuConf_McuClockSettingConfig_MAIN_RTI_0 (2U)
234 #define McuConf_McuResetReasonConf_MCU_POWER_ON_RESET (0U)
235 #define McuConf_McuResetReasonConf_MCU_WATCHDOG_RESET (1U)
236 #define McuConf_McuResetReasonConf_MCU_SW_RESET (2U)
237 #define McuConf_McuResetReasonConf_MCU_RESET_UNDEFINED (3U)
516 (uint32 moduleId, uint32 clkId, uint64 ParentId);
Mcu_RamStateType
Enumeration of ranstate queried by Mcu_GetRamState()
Definition: Mcu_Cfg.h:471
uint8 numFields
Definition: Mcu_Cfg.h:527
const Mcu_ResetStatusMap * resetMap
Definition: Mcu_Cfg.h:528
uint16 sdDiv
Definition: Mcu_Cfg.h:447
uint64 MCU_PLL_HSDIV2
Definition: Mcu_Cfg.h:451
Mcu_PllSourceIdType
Type for PLL source selection.
Definition: Mcu_Cfg.h:501
uint16 M2
Definition: Mcu_Cfg.h:445
uint16 N
Definition: Mcu_Cfg.h:444
#define MCU_RESET_STATUS_NUMBER
Definition: Mcu_Cfg.h:195
uint32 rawresetval
Definition: Mcu_Cfg.h:520
uint64 MCU_PLL_HSDIV3
Definition: Mcu_Cfg.h:452
Mcu_ModuleName
Definition: Mcu_Cfg.h:283
Mcu_PllStatusType
This is a status value returned by the function Mcu_GetPllStatus() of the MCU module.
Definition: Mcu_Cfg.h:433
uint8 Mcu_RamDefaultValue
Definition: Mcu_Cfg.h:485
const Mcu_ResetInfo Mcu_ResetInfoTbl
uint16 FracM
Definition: Mcu_Cfg.h:446
uint64 MCU_PLL_HSDIV1
Definition: Mcu_Cfg.h:450
Mcu_ClkSourceIdType
This is the type of the clock source in clock tree that is selectable for peripheral....
Definition: Mcu_Cfg.h:415
const struct Mcu_ConfigType_s McuModuleConfiguration_0
MCU Configuration struct declaration.
Mcu_PllClkDivType Mcu_PllClk3
Definition: Mcu_Cfg.h:462
Mcu_PllClkDivType Mcu_PllClk1
Definition: Mcu_Cfg.h:460
uint64 MCU_PLL_CLKOUT
Definition: Mcu_Cfg.h:448
uint8 * Mcu_RamSectionBaseAddress
Definition: Mcu_Cfg.h:483
Mcu_DomainType
Definition: Mcu_Cfg.h:272
uint32 Mcu_RamSectionBytes
Definition: Mcu_Cfg.h:487
Std_ReturnType(* Mcu_CBKFunctionPtrType)(uint32 moduleId, uint32 clkId, uint64 ParentId)
Pointer to Callback function.
Definition: Mcu_Cfg.h:516
Mcu_ClkModuleIdType
Clock source config modules id enum.
Definition: Mcu_Cfg.h:314
const Mcu_ResetStatusMap Mcu_ResetStatusMapTbl[MCU_RESET_STATUS_NUMBER]
Mcu_ResetType
This is the type of the reset enumerator containing the subset of reset types. It is not required t...
Definition: Mcu_Cfg.h:258
Mcu_ResetType resetReason
Definition: Mcu_Cfg.h:521
Mcu_PllClkDivType Mcu_PllClk2
Definition: Mcu_Cfg.h:461
uint64 MCU_PLL_HSDIV0
Definition: Mcu_Cfg.h:449
@ MCU_RAMSTATE_INVALID
Definition: Mcu_Cfg.h:472
@ MCU_RAMSTATE_VALID
Definition: Mcu_Cfg.h:473
@ MCU_CLKSRC_APLL
Definition: Mcu_Cfg.h:503
@ MCU_CLKSRC_DPLL
Definition: Mcu_Cfg.h:502
@ Ecap
Definition: Mcu_Cfg.h:294
@ Mcspi
Definition: Mcu_Cfg.h:292
@ Ospi
Definition: Mcu_Cfg.h:296
@ Timer
Definition: Mcu_Cfg.h:288
@ Cddipc
Definition: Mcu_Cfg.h:300
@ Adc
Definition: Mcu_Cfg.h:284
@ Epwm
Definition: Mcu_Cfg.h:298
@ Gpio
Definition: Mcu_Cfg.h:286
@ Mcan
Definition: Mcu_Cfg.h:302
@ Rti
Definition: Mcu_Cfg.h:290
@ MCU_PLL_LOCKED
Definition: Mcu_Cfg.h:434
@ MCU_PLL_STATUS_UNDEFINED
Definition: Mcu_Cfg.h:436
@ MCU_PLL_UNLOCKED
Definition: Mcu_Cfg.h:435
@ MCU_CLKSRC_5
Definition: Mcu_Cfg.h:421
@ MCU_CLKSRC_6
Definition: Mcu_Cfg.h:422
@ MCU_CLKSRC_MAX
Definition: Mcu_Cfg.h:423
@ MCU_CLKSRC_2
Definition: Mcu_Cfg.h:418
@ MCU_CLKSRC_4
Definition: Mcu_Cfg.h:420
@ MCU_CLKSRC_0
Definition: Mcu_Cfg.h:416
@ MCU_CLKSRC_3
Definition: Mcu_Cfg.h:419
@ MCU_CLKSRC_1
Definition: Mcu_Cfg.h:417
@ MAIN
Definition: Mcu_Cfg.h:275
@ WKUP
Definition: Mcu_Cfg.h:277
@ MCU
Definition: Mcu_Cfg.h:273
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER2
Definition: Mcu_Cfg.h:329
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI15
Definition: Mcu_Cfg.h:364
@ MCU_CLKSRC_MODULE_ID_WKUP_GPIO0
Definition: Mcu_Cfg.h:317
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM3
Definition: Mcu_Cfg.h:388
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI4
Definition: Mcu_Cfg.h:376
@ MCU_CLKSRC_MODULE_ID_MCU_MCAN1
Definition: Mcu_Cfg.h:393
@ MCU_CLKSRC_MODULE_ID_MAIN_ECAP0
Definition: Mcu_Cfg.h:380
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER4
Definition: Mcu_Cfg.h:341
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI1
Definition: Mcu_Cfg.h:360
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN3
Definition: Mcu_Cfg.h:397
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO0
Definition: Mcu_Cfg.h:319
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER11
Definition: Mcu_Cfg.h:348
@ MCU_CLKSRC_MODULE_ID_MCU_OSPI1
Definition: Mcu_Cfg.h:384
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO5
Definition: Mcu_Cfg.h:324
@ MCU_CLKSRC_MODULE_ID_MCU_RTI0
Definition: Mcu_Cfg.h:357
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER7
Definition: Mcu_Cfg.h:344
@ MCU_CLKSRC_MODULE_ID_WKUP_GPIO1
Definition: Mcu_Cfg.h:318
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN9
Definition: Mcu_Cfg.h:403
@ MCU_CLKSRC_MODULE_ID_MCU_MCSPI0
Definition: Mcu_Cfg.h:369
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI6
Definition: Mcu_Cfg.h:378
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO2
Definition: Mcu_Cfg.h:321
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI31
Definition: Mcu_Cfg.h:368
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER6
Definition: Mcu_Cfg.h:343
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI25
Definition: Mcu_Cfg.h:362
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO7
Definition: Mcu_Cfg.h:326
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER5
Definition: Mcu_Cfg.h:342
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI16
Definition: Mcu_Cfg.h:363
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER8
Definition: Mcu_Cfg.h:335
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN8
Definition: Mcu_Cfg.h:402
@ MCU_CLKSRC_MODULE_ID_MCU_MCAN0
Definition: Mcu_Cfg.h:392
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO1
Definition: Mcu_Cfg.h:320
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN6
Definition: Mcu_Cfg.h:400
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN1
Definition: Mcu_Cfg.h:395
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO6
Definition: Mcu_Cfg.h:325
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN10
Definition: Mcu_Cfg.h:404
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN12
Definition: Mcu_Cfg.h:406
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER0
Definition: Mcu_Cfg.h:327
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER5
Definition: Mcu_Cfg.h:332
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI2
Definition: Mcu_Cfg.h:374
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER12
Definition: Mcu_Cfg.h:349
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI5
Definition: Mcu_Cfg.h:377
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER10
Definition: Mcu_Cfg.h:347
@ MCU_CLKSRC_MODULE_ID_MCU_MCSPI2
Definition: Mcu_Cfg.h:371
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI24
Definition: Mcu_Cfg.h:361
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER2
Definition: Mcu_Cfg.h:339
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER18
Definition: Mcu_Cfg.h:355
@ MCU_CLKSRC_MODULE_ID_MCU_ADC1
Definition: Mcu_Cfg.h:316
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER4
Definition: Mcu_Cfg.h:331
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN4
Definition: Mcu_Cfg.h:398
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER0
Definition: Mcu_Cfg.h:337
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER17
Definition: Mcu_Cfg.h:354
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM1
Definition: Mcu_Cfg.h:386
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI1
Definition: Mcu_Cfg.h:373
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER3
Definition: Mcu_Cfg.h:340
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM0
Definition: Mcu_Cfg.h:385
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO3
Definition: Mcu_Cfg.h:322
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN0
Definition: Mcu_Cfg.h:394
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER7
Definition: Mcu_Cfg.h:334
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER16
Definition: Mcu_Cfg.h:353
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER6
Definition: Mcu_Cfg.h:333
@ MCU_CLKSRC_MODULE_ID_MCU_RTI1
Definition: Mcu_Cfg.h:358
@ MCU_CLKSRC_MODULE_ID_MCU_OSPI0
Definition: Mcu_Cfg.h:383
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER19
Definition: Mcu_Cfg.h:356
@ MCU_CLKSRC_MODULE_ID_MCU_MCSPI1
Definition: Mcu_Cfg.h:370
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM2
Definition: Mcu_Cfg.h:387
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER8
Definition: Mcu_Cfg.h:345
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER1
Definition: Mcu_Cfg.h:328
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN2
Definition: Mcu_Cfg.h:396
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI0
Definition: Mcu_Cfg.h:372
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM5
Definition: Mcu_Cfg.h:390
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN13
Definition: Mcu_Cfg.h:407
@ MCU_CLKSRC_MODULE_ID_MAIN_GPIO4
Definition: Mcu_Cfg.h:323
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI0
Definition: Mcu_Cfg.h:359
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI29
Definition: Mcu_Cfg.h:366
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN11
Definition: Mcu_Cfg.h:405
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN5
Definition: Mcu_Cfg.h:399
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI28
Definition: Mcu_Cfg.h:365
@ MCU_CLKSRC_MODULE_ID_MAIN_EHRPWM4
Definition: Mcu_Cfg.h:389
@ MCU_CLKSRC_MODULE_ID_MAIN_MCAN7
Definition: Mcu_Cfg.h:401
@ MCU_CLKSRC_MODULE_ID_MAILBOX0
Definition: Mcu_Cfg.h:391
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER1
Definition: Mcu_Cfg.h:338
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER14
Definition: Mcu_Cfg.h:351
@ MCU_CLKSRC_MODULE_ID_MAIN_ECAP1
Definition: Mcu_Cfg.h:381
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI7
Definition: Mcu_Cfg.h:379
@ MCU_CLKSRC_MODULE_ID_MAIN_ECAP2
Definition: Mcu_Cfg.h:382
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER13
Definition: Mcu_Cfg.h:350
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER9
Definition: Mcu_Cfg.h:346
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER9
Definition: Mcu_Cfg.h:336
@ MCU_CLKSRC_MODULE_ID_MCU_ADC0
Definition: Mcu_Cfg.h:315
@ MCU_CLKSRC_MODULE_ID_MCU_TIMER3
Definition: Mcu_Cfg.h:330
@ MCU_CLKSRC_MODULE_ID_MAIN_MCSPI3
Definition: Mcu_Cfg.h:375
@ MCU_CLKSRC_MODULE_ID_MAIN_TIMER15
Definition: Mcu_Cfg.h:352
@ MCU_CLKSRC_MODULE_ID_MAIN_RTI30
Definition: Mcu_Cfg.h:367
@ MCU_DEBUG_RESET
Definition: Mcu_Cfg.h:264
@ MCU_SW_RESET
Definition: Mcu_Cfg.h:263
@ MCU_POWER_ON_RESET
Definition: Mcu_Cfg.h:260
@ MCU_WATCHDOG_RESET
Definition: Mcu_Cfg.h:261
@ MCU_RESET_UNDEFINED
Definition: Mcu_Cfg.h:265
@ MCU_COLD_SW_RESET
Definition: Mcu_Cfg.h:262
@ MCU_RESET_CLEAR
Definition: Mcu_Cfg.h:266
Structure for enumerating the clock outputs of HSDIVIDER.
Definition: Mcu_Cfg.h:443
MCU PLL CONFIG structure.
Definition: Mcu_Cfg.h:459
Structure for data pre-setting to be initialized.
Definition: Mcu_Cfg.h:482
Definition: Mcu_Cfg.h:526
Definition: Mcu_Cfg.h:519