138 #include "Std_Types.h"
140 #if defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_J721S2) || defined (SOC_J784S4) || defined (SOC_J742S2)
141 #include <ti/drv/udma/udma.h>
143 #include "Spi/mcspi_hw/V0/mcspi.h"
161 #define SPI_SW_MAJOR_VERSION (9U)
163 #define SPI_SW_MINOR_VERSION (2U)
165 #define SPI_SW_PATCH_VERSION (0U)
175 #define SPI_AR_RELEASE_MAJOR_VERSION (4U)
177 #define SPI_AR_RELEASE_MINOR_VERSION (3U)
179 #define SPI_AR_RELEASE_REVISION_VERSION (1U)
187 #define SPI_VENDOR_ID ((uint16) 44U)
189 #define SPI_MODULE_ID ((uint16) 83U)
191 #define SPI_INSTANCE_ID ((uint8) 0U)
203 #define SPI_IB_EB (2U)
250 #ifndef SPI_E_PARAM_CHANNEL
252 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU)
254 #ifndef SPI_E_PARAM_JOB
256 #define SPI_E_PARAM_JOB ((uint8) 0x0BU)
258 #ifndef SPI_E_PARAM_SEQ
260 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU)
262 #ifndef SPI_E_PARAM_LENGTH
264 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU)
266 #ifndef SPI_E_PARAM_UNIT
268 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU)
270 #ifndef SPI_E_PARAM_POINTER
272 #define SPI_E_PARAM_POINTER ((uint8) 0x10U)
276 #define SPI_E_UNINIT ((uint8) 0x1AU)
278 #ifndef SPI_E_SEQ_PENDING
280 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU)
282 #ifndef SPI_E_SEQ_IN_PROCESS
284 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU)
286 #ifndef SPI_E_ALREADY_INITIALIZED
291 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU)
293 #ifndef SPI_E_SEQUENCE_NOT_OK
295 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU)
308 #define SPI_SID_INIT ((uint8) 0x00U)
310 #define SPI_SID_DEINIT ((uint8) 0x01U)
312 #define SPI_SID_WRITE_IB ((uint8) 0x02U)
314 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U)
316 #define SPI_SID_READ_IB ((uint8) 0x04U)
318 #define SPI_SID_SETUP_EB ((uint8) 0x05U)
320 #define SPI_SID_GET_STATUS ((uint8) 0x06U)
322 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U)
324 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U)
326 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U)
328 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU)
330 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU)
332 #define SPI_SID_CANCEL ((uint8) 0x0CU)
334 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU)
336 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U)
338 #define SPI_SID_DMA_INIT ((uint8) 0x20U)
350 #define SPI_MCSPI_FCLK (48000000U)
360 #define SPI_CFG_ID_0 (0x01U)
363 #define SPI_CFG_ID_1 (0x02U)
365 #define SPI_CFG_ID_2 (0x04U)
367 #define SPI_CFG_ID_3 (0x08U)
369 #define SPI_CFG_ID_4 (0x10U)
371 #define SPI_CFG_ID_5 (0x20U)
373 #define SPI_CFG_ID_6 (0x40U)
375 #define SPI_CFG_ID_7 (0x80U)
377 #define SPI_CFG_ID_8 (0x100U)
807 typedef struct Spi_ConfigType_s
851 typedef struct Spi_ChannelConfigType_PC_s
863 typedef struct Spi_JobConfigType_PC_s
877 typedef struct Spi_SeqConfigType_PC_s
883 #if (STD_ON == SPI_REGISTER_READBACK_API)
1030 #if (STD_ON == SPI_VERSION_INFO_API)
1052 P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1055 #if (STD_ON == SPI_HW_STATUS_API)
1080 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1143 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1176 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1184 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \
1210 #if (STD_ON == SPI_CANCEL_API)
1232 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \
1258 #if (SPI_SCALEABILITY == SPI_LEVEL_2)
1308 #if (STD_ON == SPI_DMA_ENABLE)
1327 const struct Udma_DrvObj* udmaObjPtr);
1330 #if (STD_ON == SPI_REGISTER_READBACK_API)
This file contains generated pre compile configuration file for SPI MCAL driver.
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:573
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:234
Std_ReturnType Spi_GetDmaHandle(const struct Udma_DrvObj *udmaObjPtr)
Service for getting DMA handle in SPI.
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:585
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:219
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:451
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:229
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:493
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:413
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:600
void(* Spi_CacheWb)(uint8 *BufPtr, uint16 LenByte)
Cache write-back function.
Definition: Spi.h:652
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping....
Definition: Spi.h:520
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:611
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:504
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:544
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:482
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
void(* Spi_CacheWbInv)(uint8 *BufPtr, uint16 LenByte)
Cache write-back invalidate function.
Definition: Spi.h:642
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
Definition: Spi.h:242
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:558
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Mcspi_IrqStatusType
Irq status and std return type.
Definition: Spi.h:626
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:434
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:396
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:211
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
void(* Spi_CacheInv)(uint8 *BufPtr, uint16 LenByte)
Cache invalidate function.
Definition: Spi.h:662
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:224
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
Definition: Spi.h:468
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:680
uint32 mcspiHlHwInfo
Definition: Spi.h:895
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:197
uint32 dmaTxChIntrNum
Definition: Spi.h:795
uint32 mcspiSyst
Definition: Spi.h:903
uint32 mcspiSysConfig
Definition: Spi.h:907
uint32 mcspiCh1config
Definition: Spi.h:910
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:194
uint32 mcspiSysStatus
Definition: Spi.h:901
uint32 mcspiRev
Definition: Spi.h:899
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:214
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:200
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:732
uint32 defaultTxData
Definition: Spi.h:678
uint8 maxExtDevCfg
Definition: Spi.h:821
uint8 seqInterruptible
Definition: Spi.h:775
Spi_JobType jobId
Definition: Spi.h:865
Spi_DataDelayType csIdleTime
Definition: Spi.h:707
uint32 mcspiCh0config
Definition: Spi.h:909
uint8 maxJobs
Definition: Spi.h:812
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON.
Definition: Spi_Cfg.h:209
Spi_TxRxMode txRxMode
Definition: Spi.h:723
uint8 maxSeq
Definition: Spi.h:815
Spi_TransferType transferType
Definition: Spi.h:690
Spi_CacheWbInv cacheWbInv
Definition: Spi.h:830
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:191
boolean enabledmaMode
Definition: Spi.h:793
Spi_HWUnitType hwUnitId
Definition: Spi.h:791
uint32 mcspiCh3config
Definition: Spi.h:912
Spi_JobPriorityType jobPriority
Definition: Spi.h:754
uint32 clkDivider
Definition: Spi.h:715
uint32 udmaInstId
Definition: Spi.h:824
uint32 mcspiHlSysConfig
Definition: Spi.h:897
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:730
uint32 jobPerSeq
Definition: Spi.h:779
uint8 externalDeviceCfgId
Definition: Spi.h:869
uint32 mcspiCh2config
Definition: Spi.h:911
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:741
uint8 dataWidth
Definition: Spi.h:675
uint16 startBitEnable
Definition: Spi.h:725
uint8 maxHwUnit
Definition: Spi.h:818
uint32 channelPerJob
Definition: Spi.h:760
Spi_CsPinType csPin
Definition: Spi.h:867
uint16 csEnable
Definition: Spi.h:700
Spi_CacheWb cacheWb
Definition: Spi.h:832
uint8 maxChannels
Definition: Spi.h:809
Spi_ChannelType channelId
Definition: Spi.h:853
Spi_ClkMode clkMode
Definition: Spi.h:721
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:777
uint32 mcspiHlRev
Definition: Spi.h:893
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:758
uint32 mcspiIrqenable
Definition: Spi.h:914
Spi_LevelType csPolarity
Definition: Spi.h:705
Spi_CsModeType csMode
Definition: Spi.h:702
uint8 channelBufType
Definition: Spi.h:673
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:203
uint32 mcspiModulctrl
Definition: Spi.h:905
Spi_LevelType startBitLevel
Definition: Spi.h:728
Spi_CacheInv cacheInv
Definition: Spi.h:834
uint32 dmaRxChIntrNum
Definition: Spi.h:797
Spi_SequenceType seqId
Definition: Spi.h:879
Spi_HWUnitType hwUnitId
Definition: Spi.h:756
@ SPI_CONTINUOUS
Definition: Spi.h:576
@ SPI_SINGLE
Definition: Spi.h:574
@ SPI_DATADELAY_0
Definition: Spi.h:586
@ SPI_DATADELAY_2
Definition: Spi.h:590
@ SPI_DATADELAY_1
Definition: Spi.h:588
@ SPI_DATADELAY_3
Definition: Spi.h:592
@ SPI_HW_UNIT_FAILED
Definition: Spi.h:456
@ SPI_HW_UNIT_OK
Definition: Spi.h:452
@ SPI_HW_UNIT_PENDING
Definition: Spi.h:454
@ SPI_LOW
Definition: Spi.h:494
@ SPI_HIGH
Definition: Spi.h:496
@ SPI_JOB_PENDING
Definition: Spi.h:416
@ SPI_JOB_FAILED
Definition: Spi.h:419
@ SPI_JOB_OK
Definition: Spi.h:414
@ SPI_JOB_QUEUED
Definition: Spi.h:421
@ DATA_LINE_1_RECEPTION
Definition: Spi.h:603
@ DATA_LINE_0_RECEPTION
Definition: Spi.h:601
@ SPI_CLK_MODE_2
Definition: Spi.h:525
@ SPI_CLK_MODE_3
Definition: Spi.h:527
@ SPI_CLK_MODE_0
Definition: Spi.h:521
@ SPI_CLK_MODE_1
Definition: Spi.h:523
@ DATA_LINE_BOTH_TRANSMISSION
Definition: Spi.h:618
@ DATA_LINE_1_TRANSMISSION
Definition: Spi.h:616
@ DATA_LINE_0_TRANSMISSION
Definition: Spi.h:614
@ DATA_LINE_NO_TRANSMISSION
Definition: Spi.h:612
@ SPI_CS1
Definition: Spi.h:507
@ SPI_CS0
Definition: Spi.h:505
@ SPI_CS3
Definition: Spi.h:511
@ SPI_CS2
Definition: Spi.h:509
@ SPI_TX_RX_MODE_BOTH
Definition: Spi.h:545
@ SPI_TX_RX_MODE_TX_ONLY
Definition: Spi.h:547
@ SPI_MSB
Definition: Spi.h:483
@ SPI_LSB
Definition: Spi.h:485
@ SPI_JOB_PRIORITY_1
Definition: Spi.h:561
@ SPI_JOB_PRIORITY_2
Definition: Spi.h:563
@ SPI_JOB_PRIORITY_0
Definition: Spi.h:559
@ SPI_JOB_PRIORITY_3
Definition: Spi.h:565
@ SPI_EVENT_PENDING
Definition: Spi.h:629
@ SPI_STATUS_READ_FAIL
Definition: Spi.h:631
@ SPI_NO_EVENT
Definition: Spi.h:627
@ SPI_SEQ_CANCELLED
Definition: Spi.h:442
@ SPI_SEQ_OK
Definition: Spi.h:435
@ SPI_SEQ_FAILED
Definition: Spi.h:440
@ SPI_SEQ_PENDING
Definition: Spi.h:437
@ SPI_UNINIT
Definition: Spi.h:397
@ SPI_IDLE
Definition: Spi.h:399
@ SPI_BUSY
Definition: Spi.h:401
@ SPI_INTERRUPT_MODE
Definition: Spi.h:472
@ SPI_POLLING_MODE
Definition: Spi.h:469
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:852
SPI Channel configuration structure.
Definition: Spi.h:672
SPI config structure.
Definition: Spi.h:808
SPI external device specific configuration structure .
Definition: Spi.h:740
SPI Hardware unit configuration structure.
Definition: Spi.h:790
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:864
SPI Job configuration structure.
Definition: Spi.h:753
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:699
SPI register readback structure.
Definition: Spi.h:889
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:878
SPI Sequence configuration structure.
Definition: Spi.h:774