TCAN4550  1p1
TCAN4x5x_MCAN_CCCR_Config_Struct Struct Reference

struct containing the bit fields of the MCAN CCCR register More...

#include <TCAN4x5x_Data_Structs.h>

Data Fields

union {
   uint32_t   word
 Full register as single 32-bit word. More...
 
   struct {
      uint8_t   reserved: 2
 Reserved (0) More...
 
      uint8_t   ASM: 1
 ASM: Restricted Operation Mode. The device can only listen to CAN traffic and acknowledge, but not send anything. More...
 
      uint8_t   reserved2: 1
 Reserved (0) More...
 
      uint8_t   CSR: 1
 CSR: Clock stop request. More...
 
      uint8_t   MON: 1
 MON: Bus monitoring mode. The device may only listen to CAN traffic, and is not allowed to acknowledge or send error frames. More...
 
      uint8_t   DAR: 1
 DAR: Disable automatic retransmission. If a transmission errors, gets a NACK, or loses arbitration, the MCAN controller will NOT try to transmit again. More...
 
      uint8_t   TEST: 1
 TEST: MCAN Test mode enable. More...
 
      uint8_t   FDOE: 1
 FDOE: Can FD mode enabled, master enable for CAN FD support. More...
 
      uint8_t   BRSE: 1
 BRSE: Bit rate switch enabled for can FD. Master enable for bit rate switching support. More...
 
      uint8_t   reserved3: 2
 Reserved (0) More...
 
      uint8_t   PXHD: 1
 PXHD: Protocol exception handling disable
0 = Protocol exception handling enabled [default]
1 = protocol exception handling disabled. More...
 
      uint8_t   EFBI: 1
 EFBI: Edge filtering during bus integration. 0 Disables this [default]. More...
 
      uint8_t   TXP: 1
 TXP: Transmit Pause Enable: Pause for 2 can bit times before next transmission. More...
 
      uint8_t   NISO: 1
 NSIO: Non Iso Operation
0: CAN FD frame format according to ISO 11898-1:2015 [default]
1: CAN FD frame format according to Bosch CAN FD Spec v1. More...
 
   } 
 
}; 
 

Detailed Description

struct containing the bit fields of the MCAN CCCR register

Definition at line 230 of file TCAN4x5x_Data_Structs.h.

Field Documentation

◆ @1

union { ... }

◆ ASM

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::ASM

ASM: Restricted Operation Mode. The device can only listen to CAN traffic and acknowledge, but not send anything.

Definition at line 243 of file TCAN4x5x_Data_Structs.h.

◆ BRSE

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::BRSE

BRSE: Bit rate switch enabled for can FD. Master enable for bit rate switching support.

Definition at line 264 of file TCAN4x5x_Data_Structs.h.

Referenced by Init_CAN().

◆ CSR

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::CSR

CSR: Clock stop request.

Definition at line 249 of file TCAN4x5x_Data_Structs.h.

◆ DAR

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::DAR

DAR: Disable automatic retransmission. If a transmission errors, gets a NACK, or loses arbitration, the MCAN controller will NOT try to transmit again.

Definition at line 255 of file TCAN4x5x_Data_Structs.h.

Referenced by Init_CAN().

◆ EFBI

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::EFBI

EFBI: Edge filtering during bus integration. 0 Disables this [default].

Definition at line 275 of file TCAN4x5x_Data_Structs.h.

◆ FDOE

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::FDOE

FDOE: Can FD mode enabled, master enable for CAN FD support.

Definition at line 261 of file TCAN4x5x_Data_Structs.h.

Referenced by Init_CAN().

◆ MON

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::MON

MON: Bus monitoring mode. The device may only listen to CAN traffic, and is not allowed to acknowledge or send error frames.

Definition at line 252 of file TCAN4x5x_Data_Structs.h.

◆ NISO

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::NISO

NSIO: Non Iso Operation
0: CAN FD frame format according to ISO 11898-1:2015 [default]
1: CAN FD frame format according to Bosch CAN FD Spec v1.

Definition at line 283 of file TCAN4x5x_Data_Structs.h.

◆ PXHD

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::PXHD

PXHD: Protocol exception handling disable
0 = Protocol exception handling enabled [default]
1 = protocol exception handling disabled.

Definition at line 272 of file TCAN4x5x_Data_Structs.h.

◆ reserved

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::reserved

Reserved (0)

Definition at line 240 of file TCAN4x5x_Data_Structs.h.

◆ reserved2

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::reserved2

Reserved (0)

Definition at line 246 of file TCAN4x5x_Data_Structs.h.

◆ reserved3

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::reserved3

Reserved (0)

Definition at line 267 of file TCAN4x5x_Data_Structs.h.

◆ TEST

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::TEST

TEST: MCAN Test mode enable.

Definition at line 258 of file TCAN4x5x_Data_Structs.h.

◆ TXP

uint8_t TCAN4x5x_MCAN_CCCR_Config_Struct::TXP

TXP: Transmit Pause Enable: Pause for 2 can bit times before next transmission.

Definition at line 278 of file TCAN4x5x_Data_Structs.h.

◆ word

uint32_t TCAN4x5x_MCAN_CCCR_Config_Struct::word

Full register as single 32-bit word.

Definition at line 235 of file TCAN4x5x_Data_Structs.h.

Referenced by TCAN4x5x_MCAN_ConfigureCCCRRegister().


The documentation for this struct was generated from the following file: