TCAN4550  1p2
TCAN4x5x_MCAN_Interrupt_Enable Struct Reference

Struct containing the MCAN interrupt enable bit field. More...

#include <TCAN4x5x_Data_Structs.h>

Data Fields

union {
   uint32_t   word
 Full register as single 32-bit word. More...
 
   struct {
      uint8_t   RF0NE: 1
 IE[0] RF0NE: Rx FIFO 0 new message. More...
 
      uint8_t   RF0WE: 1
 IE[1] RF0WE: Rx FIFO 0 watermark reached. More...
 
      uint8_t   RF0FE: 1
 IE[2] RF0FE: Rx FIFO 0 full. More...
 
      uint8_t   RF0LE: 1
 IE[3] RF0LE: Rx FIFO 0 message lost. More...
 
      uint8_t   RF1NE: 1
 IE[4] RF1NE: Rx FIFO 1 new message. More...
 
      uint8_t   RF1WE: 1
 IE[5] RF1WE: RX FIFO 1 watermark reached. More...
 
      uint8_t   RF1FE: 1
 IE[6] RF1FE: Rx FIFO 1 full. More...
 
      uint8_t   RF1LE: 1
 IE[7] RF1LE: Rx FIFO 1 message lost. More...
 
      uint8_t   HPME: 1
 IE[8] HPME: High priority message. More...
 
      uint8_t   TCE: 1
 IE[9] TCE: Transmission completed. More...
 
      uint8_t   TCFE: 1
 IE[10] TCFE: Transmission cancellation finished. More...
 
      uint8_t   TFEE: 1
 IE[11] TFEE: Tx FIFO Empty. More...
 
      uint8_t   TEFNE: 1
 IE[12] TEFNE: Tx Event FIFO new entry. More...
 
      uint8_t   TEFWE: 1
 IE[13] TEFWE: Tx Event FIFO watermark reached. More...
 
      uint8_t   TEFFE: 1
 IE[14] TEFFE: Tx Event FIFO full. More...
 
      uint8_t   TEFLE: 1
 IE[15] TEFLE: Tx Event FIFO element lost. More...
 
      uint8_t   TSWE: 1
 IE[16] TSWE: Timestamp wraparound. More...
 
      uint8_t   MRAFE: 1
 IE[17] MRAFE: Message RAM access failure. More...
 
      uint8_t   TOOE: 1
 IE[18] TOOE: Time out occured. More...
 
      uint8_t   DRXE: 1
 IE[19] DRXE: Message stored to dedicated RX buffer. More...
 
      uint8_t   BECE: 1
 IE[20] BECE: MRAM Bit error corrected. More...
 
      uint8_t   BEUE: 1
 IE[21] BEUE: MRAM Bit error uncorrected. More...
 
      uint8_t   ELOE: 1
 IE[22] ELOE: Error logging overflow. More...
 
      uint8_t   EPE: 1
 IE[23] EPE: Error_passive status changed. More...
 
      uint8_t   EWE: 1
 IE[24] EWE: Error_warning status changed. More...
 
      uint8_t   BOE: 1
 IE[25] BOE: Bus_off status changed. More...
 
      uint8_t   WDIE: 1
 IE[26] WDIE: MRAM Watchdog Interrupt. More...
 
      uint8_t   PEAE: 1
 IE[27] PEAE Protocol Error in arbitration phase (nominal bit time used) More...
 
      uint8_t   PEDE: 1
 IE[28] PEDE: Protocol error in data phase (data bit time is used) More...
 
      uint8_t   ARAE: 1
 IE[29] ARAE: Access to reserved address. More...
 
      uint8_t   reserved: 2
 IE[30:31] Reserved, not writable. More...
 
   } 
 
}; 
 

Detailed Description

Struct containing the MCAN interrupt enable bit field.

Definition at line 416 of file TCAN4x5x_Data_Structs.h.

Field Documentation

◆ @9

union { ... }

◆ ARAE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::ARAE

IE[29] ARAE: Access to reserved address.

Definition at line 512 of file TCAN4x5x_Data_Structs.h.

◆ BECE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::BECE

IE[20] BECE: MRAM Bit error corrected.

Definition at line 485 of file TCAN4x5x_Data_Structs.h.

◆ BEUE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::BEUE

IE[21] BEUE: MRAM Bit error uncorrected.

Definition at line 488 of file TCAN4x5x_Data_Structs.h.

◆ BOE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::BOE

IE[25] BOE: Bus_off status changed.

Definition at line 500 of file TCAN4x5x_Data_Structs.h.

◆ DRXE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::DRXE

IE[19] DRXE: Message stored to dedicated RX buffer.

Definition at line 482 of file TCAN4x5x_Data_Structs.h.

◆ ELOE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::ELOE

IE[22] ELOE: Error logging overflow.

Definition at line 491 of file TCAN4x5x_Data_Structs.h.

◆ EPE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::EPE

IE[23] EPE: Error_passive status changed.

Definition at line 494 of file TCAN4x5x_Data_Structs.h.

◆ EWE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::EWE

IE[24] EWE: Error_warning status changed.

Definition at line 497 of file TCAN4x5x_Data_Structs.h.

◆ HPME

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::HPME

IE[8] HPME: High priority message.

Definition at line 449 of file TCAN4x5x_Data_Structs.h.

◆ MRAFE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::MRAFE

IE[17] MRAFE: Message RAM access failure.

Definition at line 476 of file TCAN4x5x_Data_Structs.h.

◆ PEAE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::PEAE

IE[27] PEAE Protocol Error in arbitration phase (nominal bit time used)

Definition at line 506 of file TCAN4x5x_Data_Structs.h.

◆ PEDE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::PEDE

IE[28] PEDE: Protocol error in data phase (data bit time is used)

Definition at line 509 of file TCAN4x5x_Data_Structs.h.

◆ reserved

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::reserved

IE[30:31] Reserved, not writable.

Definition at line 515 of file TCAN4x5x_Data_Structs.h.

◆ RF0FE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF0FE

IE[2] RF0FE: Rx FIFO 0 full.

Definition at line 431 of file TCAN4x5x_Data_Structs.h.

◆ RF0LE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF0LE

IE[3] RF0LE: Rx FIFO 0 message lost.

Definition at line 434 of file TCAN4x5x_Data_Structs.h.

◆ RF0NE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF0NE

IE[0] RF0NE: Rx FIFO 0 new message.

Definition at line 425 of file TCAN4x5x_Data_Structs.h.

◆ RF0WE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF0WE

IE[1] RF0WE: Rx FIFO 0 watermark reached.

Definition at line 428 of file TCAN4x5x_Data_Structs.h.

◆ RF1FE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF1FE

IE[6] RF1FE: Rx FIFO 1 full.

Definition at line 443 of file TCAN4x5x_Data_Structs.h.

◆ RF1LE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF1LE

IE[7] RF1LE: Rx FIFO 1 message lost.

Definition at line 446 of file TCAN4x5x_Data_Structs.h.

◆ RF1NE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF1NE

IE[4] RF1NE: Rx FIFO 1 new message.

Definition at line 437 of file TCAN4x5x_Data_Structs.h.

◆ RF1WE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::RF1WE

IE[5] RF1WE: RX FIFO 1 watermark reached.

Definition at line 440 of file TCAN4x5x_Data_Structs.h.

◆ TCE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TCE

IE[9] TCE: Transmission completed.

Definition at line 452 of file TCAN4x5x_Data_Structs.h.

◆ TCFE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TCFE

IE[10] TCFE: Transmission cancellation finished.

Definition at line 455 of file TCAN4x5x_Data_Structs.h.

◆ TEFFE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TEFFE

IE[14] TEFFE: Tx Event FIFO full.

Definition at line 467 of file TCAN4x5x_Data_Structs.h.

◆ TEFLE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TEFLE

IE[15] TEFLE: Tx Event FIFO element lost.

Definition at line 470 of file TCAN4x5x_Data_Structs.h.

◆ TEFNE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TEFNE

IE[12] TEFNE: Tx Event FIFO new entry.

Definition at line 461 of file TCAN4x5x_Data_Structs.h.

◆ TEFWE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TEFWE

IE[13] TEFWE: Tx Event FIFO watermark reached.

Definition at line 464 of file TCAN4x5x_Data_Structs.h.

◆ TFEE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TFEE

IE[11] TFEE: Tx FIFO Empty.

Definition at line 458 of file TCAN4x5x_Data_Structs.h.

◆ TOOE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TOOE

IE[18] TOOE: Time out occured.

Definition at line 479 of file TCAN4x5x_Data_Structs.h.

◆ TSWE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::TSWE

IE[16] TSWE: Timestamp wraparound.

Definition at line 473 of file TCAN4x5x_Data_Structs.h.

◆ WDIE

uint8_t TCAN4x5x_MCAN_Interrupt_Enable::WDIE

IE[26] WDIE: MRAM Watchdog Interrupt.

Definition at line 503 of file TCAN4x5x_Data_Structs.h.

◆ word

uint32_t TCAN4x5x_MCAN_Interrupt_Enable::word

Full register as single 32-bit word.

Definition at line 421 of file TCAN4x5x_Data_Structs.h.

Referenced by TCAN4x5x_MCAN_ConfigureInterruptEnable(), and TCAN4x5x_MCAN_ReadInterruptEnable().


The documentation for this struct was generated from the following file: