TCAN4550
1p1
|
Struct containing the MCAN interrupt bit field. More...
#include <TCAN4x5x_Data_Structs.h>
Data Fields | |
union { | |
uint32_t word | |
Full register as single 32-bit word. More... | |
struct { | |
uint8_t RF0N: 1 | |
IR[0] RF0N: Rx FIFO 0 new message. More... | |
uint8_t RF0W: 1 | |
IR[1] RF0W: Rx FIFO 0 watermark reached. More... | |
uint8_t RF0F: 1 | |
IR[2] RF0F: Rx FIFO 0 full. More... | |
uint8_t RF0L: 1 | |
IR[3] RF0L: Rx FIFO 0 message lost. More... | |
uint8_t RF1N: 1 | |
IR[4] RF1N: Rx FIFO 1 new message. More... | |
uint8_t RF1W: 1 | |
IR[5] RF1W: RX FIFO 1 watermark reached. More... | |
uint8_t RF1F: 1 | |
IR[6] RF1F: Rx FIFO 1 full. More... | |
uint8_t RF1L: 1 | |
IR[7] RF1L: Rx FIFO 1 message lost. More... | |
uint8_t HPM: 1 | |
IR[8] HPM: High priority message. More... | |
uint8_t TC: 1 | |
IR[9] TC: Transmission completed. More... | |
uint8_t TCF: 1 | |
IR[10] TCF: Transmission cancellation finished. More... | |
uint8_t TFE: 1 | |
IR[11] TFE: Tx FIFO Empty. More... | |
uint8_t TEFN: 1 | |
IR[12] TEFN: Tx Event FIFO new entry. More... | |
uint8_t TEFW: 1 | |
IR[13] TEFW: Tx Event FIFO water mark reached. More... | |
uint8_t TEFF: 1 | |
IR[14] TEFF: Tx Event FIFO full. More... | |
uint8_t TEFL: 1 | |
IR[15] TEFL: Tx Event FIFO element lost. More... | |
uint8_t TSW: 1 | |
IR[16] TSW: Timestamp wrapped around. More... | |
uint8_t MRAF: 1 | |
IR[17] MRAF: Message RAM access failure. More... | |
uint8_t TOO: 1 | |
IR[18] TOO: Time out occurred. More... | |
uint8_t DRX: 1 | |
IR[19] DRX: Message stored to dedicated RX buffer. More... | |
uint8_t BEC: 1 | |
IR[20] BEC: MRAM Bit error corrected. More... | |
uint8_t BEU: 1 | |
IR[21] BEU: MRAM Bit error uncorrected. More... | |
uint8_t ELO: 1 | |
IR[22] ELO: Error logging overflow. More... | |
uint8_t EP: 1 | |
IR[23] EP: Error_passive status changed. More... | |
uint8_t EW: 1 | |
IR[24] EW: Error_warning status changed. More... | |
uint8_t BO: 1 | |
IR[25] BO: Bus_off status changed. More... | |
uint8_t WDI: 1 | |
IR[26] WDI: MRAM Watchdog Interrupt. More... | |
uint8_t PEA: 1 | |
IR[27] PEA Protocol Error in arbitration phase (nominal bit time used) More... | |
uint8_t PED: 1 | |
IR[28] PED: Protocol error in data phase (data bit time is used) More... | |
uint8_t ARA: 1 | |
IR[29] ARA: Access to reserved address. More... | |
uint8_t reserved: 2 | |
IR[30:31] Reserved, not writable. More... | |
} | |
}; | |
Struct containing the MCAN interrupt bit field.
Definition at line 295 of file TCAN4x5x_Data_Structs.h.
union { ... } |
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::ARA |
IR[29] ARA: Access to reserved address.
Definition at line 391 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::BEC |
IR[20] BEC: MRAM Bit error corrected.
Definition at line 364 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::BEU |
IR[21] BEU: MRAM Bit error uncorrected.
Definition at line 367 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::BO |
IR[25] BO: Bus_off status changed.
Definition at line 379 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::DRX |
IR[19] DRX: Message stored to dedicated RX buffer.
Definition at line 361 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::ELO |
IR[22] ELO: Error logging overflow.
Definition at line 370 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::EP |
IR[23] EP: Error_passive status changed.
Definition at line 373 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::EW |
IR[24] EW: Error_warning status changed.
Definition at line 376 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::HPM |
IR[8] HPM: High priority message.
Definition at line 328 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::MRAF |
IR[17] MRAF: Message RAM access failure.
Definition at line 355 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::PEA |
IR[27] PEA Protocol Error in arbitration phase (nominal bit time used)
Definition at line 385 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::PED |
IR[28] PED: Protocol error in data phase (data bit time is used)
Definition at line 388 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::reserved |
IR[30:31] Reserved, not writable.
Definition at line 394 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF0F |
IR[2] RF0F: Rx FIFO 0 full.
Definition at line 310 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF0L |
IR[3] RF0L: Rx FIFO 0 message lost.
Definition at line 313 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF0N |
IR[0] RF0N: Rx FIFO 0 new message.
Definition at line 304 of file TCAN4x5x_Data_Structs.h.
Referenced by main().
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF0W |
IR[1] RF0W: Rx FIFO 0 watermark reached.
Definition at line 307 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF1F |
IR[6] RF1F: Rx FIFO 1 full.
Definition at line 322 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF1L |
IR[7] RF1L: Rx FIFO 1 message lost.
Definition at line 325 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF1N |
IR[4] RF1N: Rx FIFO 1 new message.
Definition at line 316 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::RF1W |
IR[5] RF1W: RX FIFO 1 watermark reached.
Definition at line 319 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TC |
IR[9] TC: Transmission completed.
Definition at line 331 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TCF |
IR[10] TCF: Transmission cancellation finished.
Definition at line 334 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TEFF |
IR[14] TEFF: Tx Event FIFO full.
Definition at line 346 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TEFL |
IR[15] TEFL: Tx Event FIFO element lost.
Definition at line 349 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TEFN |
IR[12] TEFN: Tx Event FIFO new entry.
Definition at line 340 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TEFW |
IR[13] TEFW: Tx Event FIFO water mark reached.
Definition at line 343 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TFE |
IR[11] TFE: Tx FIFO Empty.
Definition at line 337 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TOO |
IR[18] TOO: Time out occurred.
Definition at line 358 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::TSW |
IR[16] TSW: Timestamp wrapped around.
Definition at line 352 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts_Struct::WDI |
IR[26] WDI: MRAM Watchdog Interrupt.
Definition at line 382 of file TCAN4x5x_Data_Structs.h.
uint32_t TCAN4x5x_MCAN_Interrupts_Struct::word |
Full register as single 32-bit word.
Definition at line 300 of file TCAN4x5x_Data_Structs.h.
Referenced by TCAN4x5x_MCAN_ClearInterrupts(), and TCAN4x5x_MCAN_ReadInterrupts().