43 #ifndef TCAN4X5X_DATA_STRUCTS_H_ 44 #define TCAN4X5X_DATA_STRUCTS_H_ uint8_t reserved
Reserved (0)
uint8_t RF1W
IR[5] RF1W: RX FIFO 1 watermark reached.
uint8_t PXHD
PXHD: Protocol exception handling disable 0 = Protocol exception handling enabled [default] 1 = p...
Dual ID filter, where both SFID1 and SFID2 hold IDs that can match (must match exactly) ...
uint8_t LWUEN
DEV_IE[14] : LWU, Local Wake Up.
uint8_t DataTimeSeg1andProp
DTSEG1: Data time segment 1 + prop segment value. Interpreted by MCAN as the value in this field + 1 ...
uint8_t ECCERREN
DEV_IE[16] : ECCERR, MRAM ECC Error.
uint8_t GLOBALERR
DEV_IR[7] : GLOBALERR, Global Error. Is the OR output of all interrupts.
uint8_t DataTqBeforeSamplePoint
DTQBSP: Number of time quanta before sample point Valid values are: 2 to 33.
uint8_t CANHCANL
DEV_IR[29] : CANHCANL, CANH and CANL shorted.
uint8_t RESERVED1
Reserved.
Reject the packet (do not store, do not notify MCU) if the filter matches the incoming message...
TCAN4x5x_MRAM_Element_Data_Size TxBufferElementSize
TX Buffers element size: The number of bytes for the TX Buffers (data payload)
TCAN4x5x_GFC_NO_MATCH_BEHAVIOR ANFS
GFC[5:4] : Accept Non-matching Frames Standard Valid values: TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0 : Accep...
uint8_t TSD
DEV_IR[19] : TSD, Thermal Shut Down.
uint8_t FAIL_SAFE_EN
DEV_MODE_PINS[13] : Fail safe mode enable. Excludes power up fail safe.
uint8_t SIDNumElements
Standard ID Number of Filter Elements: The number of 11-bit filters the user would like Valid range...
uint8_t PED
IR[28] PED: Protocol error in data phase (data bit time is used)
uint8_t CANHCANLEN
DEV_IE[29] : CANHCANL, CANH and CANL shorted.
uint8_t FDOE
FDOE: Can FD mode enabled, master enable for CAN FD support.
uint8_t CANLGNDEN
DEV_IE[27] : CANLGND, CANL GND.
uint8_t BECE
IE[20] BECE: MRAM Bit error corrected.
uint8_t TEFWE
IE[13] TEFWE: Tx Event FIFO watermark reached.
Classic Filter, EFID1 is the ID/filter, and EFID2 is the mask.
uint8_t BEU
IR[21] BEU: MRAM Bit error uncorrected.
uint8_t FRAME_OVF
DEV_IR[12] : FRAME_OVF, Frame Error Overflow (If Selective Wake is equipped)
uint8_t RF1FE
IE[6] RF1FE: Rx FIFO 1 full.
uint16_t NominalBitRatePrescaler
NBRP: The prescaler value from the MCAN system clock. Value interpreted as 1:x Valid range is: 1 to...
uint8_t NominalTimeSeg2
NTSEG2: Data time segment 2. Interpreted by MCAN as the value is this field + 1 Valid values are: 0...
TCAN4x5x_GFC_NO_MATCH_BEHAVIOR
uint8_t RF0WE
IE[1] RF0WE: Rx FIFO 0 watermark reached.
Used to setup the timing parameters of the MCAN module This is the raw MCAN form of the struct which ...
Struct containing the device interrupt enable bit field.
uint32_t word
Full register as single 32-bit word.
uint8_t TFE
IR[11] TFE: Tx FIFO Empty.
uint8_t BEUE
IE[21] BEUE: MRAM Bit error uncorrected.
uint8_t TEST
TEST: MCAN Test mode enable.
uint8_t RF1F
IR[6] RF1F: Rx FIFO 1 full.
uint8_t DataTimeSeg2
DTSEG2: Data time segment 2. Interpreted by MCAN as the value is this field + 1 Valid values are: 0...
uint32_t word
full register as single 32-bit word
uint8_t HPME
IE[8] HPME: High priority message.
TCAN4x5x_MRAM_Element_Data_Size
Data payload defines for the different MRAM sections, used by the TCAN4x5x_MRAM_Config struct...
Store in RX FIFO 0 and set a high priority message interrupt if the filter matches the incoming messa...
uint8_t ECCERR
DEV_IR[16] : ECCERR, MRAM ECC Error.
uint8_t PWRON
DEV_IR[20] : PWRON, Power On Interrupt.
Dual ID filter matches if the incoming ID matches EFID1 or EFID2.
uint8_t WKERREN
DEV_IE[13] : WKERR, Wake Error.
uint8_t UVSUPEN
DEV_IE[22] : UVSUP, Undervoltage on VSUP and VCCOUT.
uint8_t NominalTqAfterSamplePoint
NTQASP: The total number of time quanta after the sample point Valid values are: 2 to 128...
uint8_t reserved2
Reserved (0)
uint8_t RESERVED2
Reserved.
uint8_t TxBufferNumElements
TX Buffers number of elements: The number of elements for the TX Buffers Valid range is: 0 to 32...
TCAN4x5x_DEV_CONFIG_GPO2_CONFIG
uint8_t DRX
IR[19] DRX: Message stored to dedicated RX buffer.
uint8_t TEFLE
IE[15] TEFLE: Tx Event FIFO element lost.
TCAN4x5x_XID_EFT_Values EFT
EFT[1:0].
uint8_t reserved
Reserved.
Store in RX FIFO 0 if the filter matches the incoming message.
uint8_t RF0NE
IE[0] RF0NE: Rx FIFO 0 new message.
uint8_t TCFE
IE[10] TCFE: Transmission cancellation finished.
uint8_t DEVICE_RESET
DEV_MODE_PINS[2] : Device reset. Write a 1 to perform a reset on the part.
uint8_t WDTO
DEV_IR[18] : WDTO, Watchdog Time Out.
uint8_t ASM
ASM: Restricted Operation Mode. The device can only listen to CAN traffic and acknowledge, but not send anything.
uint8_t TSWE
IE[16] TSWE: Timestamp wraparound.
uint8_t CANBUSGNDEN
DEV_IE[25] : CANBUSGND, CAN Shorted to GND.
Struct containing the register values for the Global Filter Configuration Register.
Store in RX FIFO 0 if the filter matches the incoming message.
uint8_t RF0LE
IE[3] RF0LE: Rx FIFO 0 message lost.
uint8_t NominalSyncJumpWidth
NSJW: Nominal time Resynchronization jump width. Interpreted by MCAN as the value is this field + 1 ...
uint8_t CANDOM
DEV_IR[8] : CANDOM, Can bus stuck dominant.
Used to setup the nominal timing parameters of the MCAN module This is the raw MCAN form of the struc...
uint8_t PEAE
IE[27] PEAE Protocol Error in arbitration phase (nominal bit time used)
uint8_t MON
MON: Bus monitoring mode. The device may only listen to CAN traffic, and is not allowed to acknowledg...
uint8_t TEFW
IR[13] TEFW: Tx Event FIFO water mark reached.
uint8_t WKRQ
DEV_IR[6] : WKRQ, Wake Request.
TCAN4x5x_DEV_CONFIG_GPO2_CONFIG GPO2_CONFIG
DEV_MODE_PINS[23:22] : nWKRQ_VOLTAGE, set the voltage rail used by the nWKRQ pin Available values are...
uint8_t CANBUSOPENEN
DEV_IE[26] : CANBUSOPEN, CAN Open fault.
uint8_t BEC
IR[20] BEC: MRAM Bit error corrected.
Reject the packet (do not store, do not notify MCU) if the filter matches the incoming message...
uint8_t CANLGND
DEV_IR[27] : CANLGND, CANL GND.
uint8_t NominalTimeSeg1andProp
NTSEG1: Data time segment 1 + prop segment value. Interpreted by MCAN as the value is this field + 1 ...
uint8_t RF1LE
IE[7] RF1LE: Rx FIFO 1 message lost.
uint32_t word
Full word for register.
TCAN4x5x_DEV_CONFIG_WDT_ACTION
Disabled filter. This filter will do nothing if it matches a packet.
uint8_t Rx1NumElements
RX FIFO 1 number of elements: The number of elements for the RX FIFO 1 Valid range is: 0 to 64...
uint8_t WD_BIT_RESET
DEV_MODE_PINS[18] : Watchdog reset bit Write a 1 to reset the watchdog timer. It's recommended to use...
uint8_t RF1NE
IE[4] RF1NE: Rx FIFO 1 new message.
TCAN4x5x_DEV_CONFIG_GPIO1_CONFIG GPIO1_CONFIG
DEV_MODE_PINS[15:14] : GPIO1 configuration Configures the mode of the GPIO1 pin as an input or output...
uint8_t TSDEN
DEV_IE[19] : TSD, Thermal Shut Down.
uint8_t TOO
IR[18] TOO: Time out occurred.
uint8_t EWE
IE[24] EWE: Error_warning status changed.
uint8_t BO
IR[25] BO: Bus_off status changed.
uint8_t DataSyncJumpWidth
DSJW: Data Resynchronization jump width. Interpreted by MCAN as the value is this field + 1 Valid v...
Range filter from EFID1 to EFID2, The XIDAM mask is not applied.
uint8_t RF0W
IR[1] RF0W: Rx FIFO 0 watermark reached.
uint8_t TEFL
IR[15] TEFL: Tx Event FIFO element lost.
uint8_t EW
IR[24] EW: Error_warning status changed.
uint8_t nWKRQ_CONFIG
DEV_MODE_PINS[8] : nWKRQ Configuration 0: Mirrors INH function 1: Wake request interrupt.
uint8_t SPIERR
DEV_IR[3] : SPI Error.
uint8_t RxBufNumElements
RX Buffers number of elements: The number of elements for the RX Buffers (Not the FIFO) Valid range...
TCAN4x5x_SID_SFEC_Values SFEC
SFEC[2:0] Standard filter element configuration.
uint8_t PEA
IR[27] PEA Protocol Error in arbitration phase (nominal bit time used)
uint8_t PWRONEN
DEV_IE[20] : PWRON, Power On Interrupt.
uint32_t word
Full register as single 32-bit word.
uint8_t HPM
IR[8] HPM: High priority message.
uint32_t EFID2
EFID2[28:0].
uint8_t CANBUSGND
DEV_IR[25] : CANBUSGND, CAN Shorted to GND.
uint8_t EFBI
EFBI: Edge filtering during bus integration. 0 Disables this [default].
TCAN4x5x_DEV_CONFIG_GPO1_CONFIG
Store in RX Buffer for debug if the filter matches the incoming message. SFT is ignored if this is se...
uint8_t TXP
TXP: Transmit Pause Enable: Pause for 2 can bit times before next transmission.
uint8_t UVIO
DEV_IR[21] : UVIO, Undervoltage on UVIO.
Standard ID filter struct.
Store in default location but set a high priority message interrupt if the filter matches the incomin...
uint8_t CANTOEN
DEV_IE[10] : CANTO, CAN Timeout.
uint32_t EFID1
EFID1[28:0].
Store in RX FIFO 1 if the filter matches the incoming message.
uint8_t FRAME_OVFEN
DEV_IE[12] : FRAME_OVF, Frame Error Overflow (If Selective Wake is equipped)
uint32_t word
Full register as single 32-bit word.
uint16_t SFID2
SFID2[10:0].
TCAN4x5x_XID_EFEC_Values EFEC
SFT Standard Filter Type.
uint8_t reserved
Reserved.
uint8_t CANHBATEN
DEV_IE[28] : CANHBAT, CANH to VBAT.
Store in RX FIFO 0 and set a high priority message interrupt if the filter matches the incoming messa...
Classic filter with SFID1 as the ID to match, and SFID2 as the bit mask that applies to SFID1...
uint32_t word
Full word of register.
uint8_t CANINT
DEV_IR[15] : CANINT, CAN Bus Wake Up Interrupt.
uint8_t WD_EN
DEV_MODE_PINS[3] : Watchdog Enable. Use the watchdog functions to control enabling the watchdog...
uint8_t RESERVED3
DEV_IR[17] : Reserved.
uint8_t RESERVED3
DEV_MODE_PINS[21:20] : RESERVED. Use test mode functions to enable test modes.
TCAN4x5x_DEV_CONFIG_WAKE_CONFIG WAKE_CONFIG
uint8_t SMSEN
DEV_IE[23] : SMS, Sleep Mode Status Flag. Set when sleep mode is entered due to WKERR, UVIO, or TSD faults.
uint8_t SMS
DEV_IR[23] : SMS, Sleep Mode Status Flag. Set when sleep mode is entered due to WKERR, UVIO, or TSD faults.
TCAN4x5x_DEV_CONFIG_WDT_ACTION WD_ACTION
DEV_MODE_PINS[17:16] : Watchdog action. Defines the behavior of the watchdog timer when it times out ...
uint8_t RF1L
IR[7] RF1L: Rx FIFO 1 message lost.
Range filter from EFID1 to EFID2.
uint8_t TEFN
IR[12] TEFN: Tx Event FIFO new entry.
uint8_t ARAE
IE[29] ARAE: Access to reserved address.
Store in default location but set a high priority message interrupt if the filter matches the incomin...
TCAN4x5x_DEV_CONFIG_WAKE_CONFIG
Store in RX FIFO 1 if the filter matches the incoming message.
uint8_t TCF
IR[10] TCF: Transmission cancellation finished.
uint8_t RESERVED2
DEV_IE[9] : RESERVED.
Defines the number of MRAM elements and the size of the elements.
Struct containing the MCAN interrupt enable bit field.
uint8_t DataBitRatePrescaler
DBRP: The prescaler value from the MCAN system clock. Interpreted by MCAN as the value is this field ...
uint8_t reserved
IR[30:31] Reserved, not writable.
uint8_t CANDOMEN
DEV_IE[8] : CANDOM, Can bus stuck dominant.
uint8_t RF1WE
IE[5] RF1WE: RX FIFO 1 watermark reached.
struct containing the bit fields of the MCAN CCCR register
uint8_t CANBUSTERMOPEN
DEV_IR[30] : CANBUSTERMOPEN, CAN Bus has termination point open.
uint8_t Rx0NumElements
RX FIFO 0 number of elements: The number of elements for the RX FIFO 0 Valid range is: 0 to 64...
uint32_t word
Full register as single 32-bit word.
uint8_t MRAFE
IE[17] MRAFE: Message RAM access failure.
uint8_t reserved3
Reserved (0)
uint8_t RESERVED1
DEV_IE[0:7] : RESERVED.
Used to setup the data timing parameters of the MCAN module This is a simplified struct, requiring only the prescaler value (1:x), number of time quanta before and after the sample point.
uint8_t RF0FE
IE[2] RF0FE: Rx FIFO 0 full.
uint8_t TxEventFIFONumElements
TX Event FIFO number of elements: The number of elements for the TX Event FIFO Valid range is: 0 to...
uint8_t INH_DIS
DEV_MODE_PINS[9] : Inhibit pin disable.
uint8_t reserved
IE[30:31] Reserved, not writable.
uint8_t RF1N
IR[4] RF1N: Rx FIFO 1 new message.
uint8_t ELOE
IE[22] ELOE: Error logging overflow.
Store in RX FIFO 1 and set a high priority message interrupt if the filter matches the incoming messa...
uint8_t TOOE
IE[18] TOOE: Time out occured.
uint8_t RESERVED4
DEV_IE[17] : Reserved.
TCAN4x5x_MRAM_Element_Data_Size RxBufElementSize
RX Buffers element size: The number of bytes for the RX Buffers (data payload), not the FIFO...
uint8_t CANBUSNORM
DEV_IR[31] : CANBUSNOM, CAN Bus is normal flag.
uint8_t TDCFilter
TDCFilter: Transmitter delay compensation Filter Window Length Valid values are 0 to 127 mtq...
uint8_t CANBUSOPEN
DEV_IR[26] : CANBUSOPEN, CAN Open fault.
uint16_t SFID1
SFID1[10:0].
uint8_t TDCOffset
TDCO: Transmitter delay compensation offset Valid values are 0 to 127 mtq.
uint8_t TFEE
IE[11] TFEE: Tx FIFO Empty.
uint8_t nWKRQ_VOLTAGE
DEV_MODE_PINS[19] : nWKRQ_VOLTAGE, set the voltage rail used by the nWKRQ pin Available values are: 0...
Struct containing the device interrupt bit field.
Disabled filter. This filter will do nothing if it matches a packet.
uint8_t CSR
CSR: Clock stop request.
TCAN4x5x_DEV_CONFIG_GPO1_CONFIG GPIO1_GPO_CONFIG
DEV_MODE_PINS[11:10] : GPIO1 pin as a GPO function configuration Configures the behavior of GPIO1 if ...
uint8_t DataTqAfterSamplePoint
DTQASP: Number of time quanta after sample point Valid values are: 1 to 16.
uint8_t TEFFE
IE[14] TEFFE: Tx Event FIFO full.
Store in RX FIFO 1 and set a high priority message interrupt if the filter matches the incoming messa...
uint8_t MRAF
IR[17] MRAF: Message RAM access failure.
uint8_t RESERVED5
DEV_MODE_PINS[29:28] : RESERVED. Use watchdog functions to set watchdog parameters.
uint8_t SWE_DIS
DEV_MODE_PINS[1] : Sleep wake error disable. Setting this to 1 will disable the 4 minute timer that p...
uint32_t word
Full register as single 32-bit word.
uint8_t RESERVED4
DEV_MODE_PINS[26:24] : RESERVED.
uint8_t PEDE
IE[28] PEDE: Protocol error in data phase (data bit time is used)
uint8_t UVSUP
DEV_IR[22] : UVSUP, Undervoltage on VSUP and VCCOUT.
Disabled filter. This filter will match nothing.
uint32_t reserved
Reserved.
uint16_t NominalTqBeforeSamplePoint
NTQBSP: The total number of time quanta prior to sample point Valid values are: 2 to 257...
uint8_t SWERR
DEV_IR[2] : Selective Wake Error (If equipped)
uint8_t RESERVED2
DEV_IR[11] : RESERVED.
Extended ID filter struct.
Store in RX Buffer for debug if the filter matches the incoming message.
uint8_t TEFF
IR[14] TEFF: Tx Event FIFO full.
uint8_t XIDNumElements
Extended ID Number of Filter Elements: The number of 29-bit filters the user would like Valid range...
uint8_t RF0N
IR[0] RF0N: Rx FIFO 0 new message.
uint8_t CANBUSNORMEN
DEV_IE[31] : CANBUSNOM, CAN Bus is normal flag.
uint8_t TEFNE
IE[12] TEFNE: Tx Event FIFO new entry.
uint8_t WDIE
IE[26] WDIE: MRAM Watchdog Interrupt.
uint8_t RESERVED
DEV_IR[9] : RESERVED.
uint8_t LWU
DEV_IR[14] : LWU, Local Wake Up.
uint8_t CLK_REF
DEV_MODE_PINS[27] : CLK_REF, used to tell the device what the input clock/crystal frequency is Availa...
uint8_t CANINTEN
DEV_IE[15] : CANINT, CAN Bus Wake Up Interrupt.
uint8_t DataBitRatePrescaler
Prescaler value, interpreted as 1:x Valid range is: 1 to 32.
uint8_t RESERVED3
DEV_IE[11] : RESERVED.
TCAN4x5x_MRAM_Element_Data_Size Rx0ElementSize
RX FIFO 0 element size: The number of bytes for the RX 0 FIFO (data payload)
uint8_t UVIOEN
DEV_IE[21] : UVIO, Undervoltage on UVIO.
uint8_t EP
IR[23] EP: Error_passive status changed.
uint8_t WKERR
DEV_IR[13] : WKERR, Wake Error.
uint8_t CANBUSBAT
DEV_IR[24] : CANBUSBAT, CAN Shorted to VBAT.
uint8_t WDTOEN
DEV_IE[18] : WDTO, Watchdog Time Out.
TCAN4x5x_GFC_NO_MATCH_BEHAVIOR ANFE
GFC[3:2] : Accept Non-matching Frames Extended Valid values: TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0 : Accep...
uint8_t CANBUSTERMOPENEN
DEV_IE[30] : CANBUSTERMOPEN, CAN Bus has termination point open.
uint8_t RF0L
IR[3] RF0L: Rx FIFO 0 message lost.
uint8_t CBF
DEV_IR[4] : CBF, CAN Bus Fault.
uint8_t CANERR
DEV_IR[5] : CANERR, CAN Error.
uint8_t M_CAN_INT
DEV_IR[1] M_CAN_INT: There are MCAN interrupts pending.
uint8_t CANTO
DEV_IR[10] : CANTO, CAN Timeout.
uint8_t BOE
IE[25] BOE: Bus_off status changed.
Struct containing the MCAN interrupt bit field.
uint8_t DRXE
IE[19] DRXE: Message stored to dedicated RX buffer.
uint8_t TSW
IR[16] TSW: Timestamp wrapped around.
Range Filter. SFID1 holds the start address, and SFID2 holds the end address. Any address in between ...
uint8_t BRSE
BRSE: Bit rate switch enabled for can FD. Master enable for bit rate switching support.
uint8_t RRFE
GFC[0] : Reject Remote Frames for Extended IDs.
uint8_t CANBUSBATEN
DEV_IE[24] : CANBUSBAT, CAN Shorted to VBAT.
TCAN4x5x_MRAM_Element_Data_Size Rx1ElementSize
RX FIFO 1 element size: The number of bytes for the RX 1 FIFO (data payload)
uint8_t RRFS
GFC[1] : Reject Remote Frames for Standard IDs.
TCAN4x5x_DEV_CONFIG_GPIO1_CONFIG
uint8_t TCE
IE[9] TCE: Transmission completed.
uint16_t NominalBitRatePrescaler
NBRP: The prescaler value from the MCAN system clock. Interpreted by MCAN as the value is this field ...
uint8_t ARA
IR[29] ARA: Access to reserved address.
uint8_t VTWD
DEV_IR[0] VTWD: Global Voltage, Temp, or Watchdog (if equipped) Interrupt.
uint8_t EPE
IE[23] EPE: Error_passive status changed.
uint8_t NISO
NSIO: Non Iso Operation 0: CAN FD frame format according to ISO 11898-1:2015 [default] 1: CAN FD ...
uint8_t RF0F
IR[2] RF0F: Rx FIFO 0 full.
uint8_t WDI
IR[26] WDI: MRAM Watchdog Interrupt.
uint8_t ELO
IR[22] ELO: Error logging overflow.
uint8_t CANHBAT
DEV_IR[28] : CANHBAT, CANH to VBAT.
uint8_t RESERVED0
DEV_MODE_PINS[0] : Test mode configuration. Reserved in this struct It is recommended to use the test...
TCAN4x5x_SID_SFT_Values SFT
SFT Standard Filter Type.
uint8_t TC
IR[9] TC: Transmission completed.
uint8_t DAR
DAR: Disable automatic retransmission. If a transmission errors, gets a NACK, or loses arbitration...
Used to setup the nominal timing parameters of the MCAN module This is a simplified struct...