TCAN4550
1p1
|
Struct containing the MCAN interrupt enable bit field. More...
#include <TCAN4x5x_Data_Structs.h>
Data Fields | |
union { | |
uint32_t word | |
Full register as single 32-bit word. More... | |
struct { | |
uint8_t RF0NE: 1 | |
IE[0] RF0NE: Rx FIFO 0 new message. More... | |
uint8_t RF0WE: 1 | |
IE[1] RF0WE: Rx FIFO 0 watermark reached. More... | |
uint8_t RF0FE: 1 | |
IE[2] RF0FE: Rx FIFO 0 full. More... | |
uint8_t RF0LE: 1 | |
IE[3] RF0LE: Rx FIFO 0 message lost. More... | |
uint8_t RF1NE: 1 | |
IE[4] RF1NE: Rx FIFO 1 new message. More... | |
uint8_t RF1WE: 1 | |
IE[5] RF1WE: RX FIFO 1 watermark reached. More... | |
uint8_t RF1FE: 1 | |
IE[6] RF1FE: Rx FIFO 1 full. More... | |
uint8_t RF1LE: 1 | |
IE[7] RF1LE: Rx FIFO 1 message lost. More... | |
uint8_t HPME: 1 | |
IE[8] HPME: High priority message. More... | |
uint8_t TCE: 1 | |
IE[9] TCE: Transmission completed. More... | |
uint8_t TCFE: 1 | |
IE[10] TCFE: Transmission cancellation finished. More... | |
uint8_t TFEE: 1 | |
IE[11] TFEE: Tx FIFO Empty. More... | |
uint8_t TEFNE: 1 | |
IE[12] TEFNE: Tx Event FIFO new entry. More... | |
uint8_t TEFWE: 1 | |
IE[13] TEFWE: Tx Event FIFO watermark reached. More... | |
uint8_t TEFFE: 1 | |
IE[14] TEFFE: Tx Event FIFO full. More... | |
uint8_t TEFLE: 1 | |
IE[15] TEFLE: Tx Event FIFO element lost. More... | |
uint8_t TSWE: 1 | |
IE[16] TSWE: Timestamp wraparound. More... | |
uint8_t MRAFE: 1 | |
IE[17] MRAFE: Message RAM access failure. More... | |
uint8_t TOOE: 1 | |
IE[18] TOOE: Time out occured. More... | |
uint8_t DRXE: 1 | |
IE[19] DRXE: Message stored to dedicated RX buffer. More... | |
uint8_t BECE: 1 | |
IE[20] BECE: MRAM Bit error corrected. More... | |
uint8_t BEUE: 1 | |
IE[21] BEUE: MRAM Bit error uncorrected. More... | |
uint8_t ELOE: 1 | |
IE[22] ELOE: Error logging overflow. More... | |
uint8_t EPE: 1 | |
IE[23] EPE: Error_passive status changed. More... | |
uint8_t EWE: 1 | |
IE[24] EWE: Error_warning status changed. More... | |
uint8_t BOE: 1 | |
IE[25] BOE: Bus_off status changed. More... | |
uint8_t WDIE: 1 | |
IE[26] WDIE: MRAM Watchdog Interrupt. More... | |
uint8_t PEAE: 1 | |
IE[27] PEAE Protocol Error in arbitration phase (nominal bit time used) More... | |
uint8_t PEDE: 1 | |
IE[28] PEDE: Protocol error in data phase (data bit time is used) More... | |
uint8_t ARAE: 1 | |
IE[29] ARAE: Access to reserved address. More... | |
uint8_t reserved: 2 | |
IE[30:31] Reserved, not writable. More... | |
} | |
}; | |
Struct containing the MCAN interrupt enable bit field.
Definition at line 403 of file TCAN4x5x_Data_Structs.h.
union { ... } |
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::ARAE |
IE[29] ARAE: Access to reserved address.
Definition at line 499 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::BECE |
IE[20] BECE: MRAM Bit error corrected.
Definition at line 472 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::BEUE |
IE[21] BEUE: MRAM Bit error uncorrected.
Definition at line 475 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::BOE |
IE[25] BOE: Bus_off status changed.
Definition at line 487 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::DRXE |
IE[19] DRXE: Message stored to dedicated RX buffer.
Definition at line 469 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::ELOE |
IE[22] ELOE: Error logging overflow.
Definition at line 478 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::EPE |
IE[23] EPE: Error_passive status changed.
Definition at line 481 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::EWE |
IE[24] EWE: Error_warning status changed.
Definition at line 484 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::HPME |
IE[8] HPME: High priority message.
Definition at line 436 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::MRAFE |
IE[17] MRAFE: Message RAM access failure.
Definition at line 463 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::PEAE |
IE[27] PEAE Protocol Error in arbitration phase (nominal bit time used)
Definition at line 493 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::PEDE |
IE[28] PEDE: Protocol error in data phase (data bit time is used)
Definition at line 496 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::reserved |
IE[30:31] Reserved, not writable.
Definition at line 502 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF0FE |
IE[2] RF0FE: Rx FIFO 0 full.
Definition at line 418 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF0LE |
IE[3] RF0LE: Rx FIFO 0 message lost.
Definition at line 421 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF0NE |
IE[0] RF0NE: Rx FIFO 0 new message.
Definition at line 412 of file TCAN4x5x_Data_Structs.h.
Referenced by Init_CAN().
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF0WE |
IE[1] RF0WE: Rx FIFO 0 watermark reached.
Definition at line 415 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF1FE |
IE[6] RF1FE: Rx FIFO 1 full.
Definition at line 430 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF1LE |
IE[7] RF1LE: Rx FIFO 1 message lost.
Definition at line 433 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF1NE |
IE[4] RF1NE: Rx FIFO 1 new message.
Definition at line 424 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::RF1WE |
IE[5] RF1WE: RX FIFO 1 watermark reached.
Definition at line 427 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TCE |
IE[9] TCE: Transmission completed.
Definition at line 439 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TCFE |
IE[10] TCFE: Transmission cancellation finished.
Definition at line 442 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TEFFE |
IE[14] TEFFE: Tx Event FIFO full.
Definition at line 454 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TEFLE |
IE[15] TEFLE: Tx Event FIFO element lost.
Definition at line 457 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TEFNE |
IE[12] TEFNE: Tx Event FIFO new entry.
Definition at line 448 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TEFWE |
IE[13] TEFWE: Tx Event FIFO watermark reached.
Definition at line 451 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TFEE |
IE[11] TFEE: Tx FIFO Empty.
Definition at line 445 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TOOE |
IE[18] TOOE: Time out occured.
Definition at line 466 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::TSWE |
IE[16] TSWE: Timestamp wraparound.
Definition at line 460 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::WDIE |
IE[26] WDIE: MRAM Watchdog Interrupt.
Definition at line 490 of file TCAN4x5x_Data_Structs.h.
uint32_t TCAN4x5x_MCAN_Interrupt_Enable_Struct::word |
Full register as single 32-bit word.
Definition at line 408 of file TCAN4x5x_Data_Structs.h.
Referenced by TCAN4x5x_MCAN_ConfigureInterruptEnable(), and TCAN4x5x_MCAN_ReadInterruptEnable().