TCAN4550
1p2
|
Struct containing the MCAN interrupt bit field. More...
#include <TCAN4x5x_Data_Structs.h>
Data Fields | |
union { | |
uint32_t word | |
Full register as single 32-bit word. More... | |
struct { | |
uint8_t RF0N: 1 | |
IR[0] RF0N: Rx FIFO 0 new message. More... | |
uint8_t RF0W: 1 | |
IR[1] RF0W: Rx FIFO 0 watermark reached. More... | |
uint8_t RF0F: 1 | |
IR[2] RF0F: Rx FIFO 0 full. More... | |
uint8_t RF0L: 1 | |
IR[3] RF0L: Rx FIFO 0 message lost. More... | |
uint8_t RF1N: 1 | |
IR[4] RF1N: Rx FIFO 1 new message. More... | |
uint8_t RF1W: 1 | |
IR[5] RF1W: RX FIFO 1 watermark reached. More... | |
uint8_t RF1F: 1 | |
IR[6] RF1F: Rx FIFO 1 full. More... | |
uint8_t RF1L: 1 | |
IR[7] RF1L: Rx FIFO 1 message lost. More... | |
uint8_t HPM: 1 | |
IR[8] HPM: High priority message. More... | |
uint8_t TC: 1 | |
IR[9] TC: Transmission completed. More... | |
uint8_t TCF: 1 | |
IR[10] TCF: Transmission cancellation finished. More... | |
uint8_t TFE: 1 | |
IR[11] TFE: Tx FIFO Empty. More... | |
uint8_t TEFN: 1 | |
IR[12] TEFN: Tx Event FIFO new entry. More... | |
uint8_t TEFW: 1 | |
IR[13] TEFW: Tx Event FIFO water mark reached. More... | |
uint8_t TEFF: 1 | |
IR[14] TEFF: Tx Event FIFO full. More... | |
uint8_t TEFL: 1 | |
IR[15] TEFL: Tx Event FIFO element lost. More... | |
uint8_t TSW: 1 | |
IR[16] TSW: Timestamp wrapped around. More... | |
uint8_t MRAF: 1 | |
IR[17] MRAF: Message RAM access failure. More... | |
uint8_t TOO: 1 | |
IR[18] TOO: Time out occurred. More... | |
uint8_t DRX: 1 | |
IR[19] DRX: Message stored to dedicated RX buffer. More... | |
uint8_t BEC: 1 | |
IR[20] BEC: MRAM Bit error corrected. More... | |
uint8_t BEU: 1 | |
IR[21] BEU: MRAM Bit error uncorrected. More... | |
uint8_t ELO: 1 | |
IR[22] ELO: Error logging overflow. More... | |
uint8_t EP: 1 | |
IR[23] EP: Error_passive status changed. More... | |
uint8_t EW: 1 | |
IR[24] EW: Error_warning status changed. More... | |
uint8_t BO: 1 | |
IR[25] BO: Bus_off status changed. More... | |
uint8_t WDI: 1 | |
IR[26] WDI: MRAM Watchdog Interrupt. More... | |
uint8_t PEA: 1 | |
IR[27] PEA Protocol Error in arbitration phase (nominal bit time used) More... | |
uint8_t PED: 1 | |
IR[28] PED: Protocol error in data phase (data bit time is used) More... | |
uint8_t ARA: 1 | |
IR[29] ARA: Access to reserved address. More... | |
uint8_t reserved: 2 | |
IR[30:31] Reserved, not writable. More... | |
} | |
}; | |
Struct containing the MCAN interrupt bit field.
Definition at line 308 of file TCAN4x5x_Data_Structs.h.
union { ... } |
uint8_t TCAN4x5x_MCAN_Interrupts::ARA |
IR[29] ARA: Access to reserved address.
Definition at line 404 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::BEC |
IR[20] BEC: MRAM Bit error corrected.
Definition at line 377 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::BEU |
IR[21] BEU: MRAM Bit error uncorrected.
Definition at line 380 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::BO |
IR[25] BO: Bus_off status changed.
Definition at line 392 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::DRX |
IR[19] DRX: Message stored to dedicated RX buffer.
Definition at line 374 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::ELO |
IR[22] ELO: Error logging overflow.
Definition at line 383 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::EP |
IR[23] EP: Error_passive status changed.
Definition at line 386 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::EW |
IR[24] EW: Error_warning status changed.
Definition at line 389 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::HPM |
IR[8] HPM: High priority message.
Definition at line 341 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::MRAF |
IR[17] MRAF: Message RAM access failure.
Definition at line 368 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::PEA |
IR[27] PEA Protocol Error in arbitration phase (nominal bit time used)
Definition at line 398 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::PED |
IR[28] PED: Protocol error in data phase (data bit time is used)
Definition at line 401 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::reserved |
IR[30:31] Reserved, not writable.
Definition at line 407 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF0F |
IR[2] RF0F: Rx FIFO 0 full.
Definition at line 323 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF0L |
IR[3] RF0L: Rx FIFO 0 message lost.
Definition at line 326 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF0N |
IR[0] RF0N: Rx FIFO 0 new message.
Definition at line 317 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF0W |
IR[1] RF0W: Rx FIFO 0 watermark reached.
Definition at line 320 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF1F |
IR[6] RF1F: Rx FIFO 1 full.
Definition at line 335 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF1L |
IR[7] RF1L: Rx FIFO 1 message lost.
Definition at line 338 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF1N |
IR[4] RF1N: Rx FIFO 1 new message.
Definition at line 329 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::RF1W |
IR[5] RF1W: RX FIFO 1 watermark reached.
Definition at line 332 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TC |
IR[9] TC: Transmission completed.
Definition at line 344 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TCF |
IR[10] TCF: Transmission cancellation finished.
Definition at line 347 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TEFF |
IR[14] TEFF: Tx Event FIFO full.
Definition at line 359 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TEFL |
IR[15] TEFL: Tx Event FIFO element lost.
Definition at line 362 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TEFN |
IR[12] TEFN: Tx Event FIFO new entry.
Definition at line 353 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TEFW |
IR[13] TEFW: Tx Event FIFO water mark reached.
Definition at line 356 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TFE |
IR[11] TFE: Tx FIFO Empty.
Definition at line 350 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TOO |
IR[18] TOO: Time out occurred.
Definition at line 371 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::TSW |
IR[16] TSW: Timestamp wrapped around.
Definition at line 365 of file TCAN4x5x_Data_Structs.h.
uint8_t TCAN4x5x_MCAN_Interrupts::WDI |
IR[26] WDI: MRAM Watchdog Interrupt.
Definition at line 395 of file TCAN4x5x_Data_Structs.h.
uint32_t TCAN4x5x_MCAN_Interrupts::word |
Full register as single 32-bit word.
Definition at line 313 of file TCAN4x5x_Data_Structs.h.
Referenced by TCAN4x5x_MCAN_ClearInterrupts(), and TCAN4x5x_MCAN_ReadInterrupts().