CC33X1 BoosterPack Hardware User’s Guide

Overview

The SimpleLink ™ CC3351 Dual-Band Wi-Fi 6 and Bluetooth ® Low Energy device enables affordable, reliable and secure connectivity in embedded applications with a processor host running Linux or an MCU host running RTOS. The CC33X1 BoosterPack ™ plug-in module is a test and development board that can be easily connected to TI LaunchPads or processor boards; thus enabling rapid software development. This document is intended to serve as a hardware user’s guide to explain the various hardware configurations and features of the BP-CC33X1. The CC33XX Radio Tool User’s Guide explains how to configure the hardware for use with Radio Tool for RF evaluation. Figure below shows an image of the BP-CC3351 BoosterPack ™ Rev. A.

Note

This guide may refer to a BP-CC33X1 BoosterPack ™ to mention either the BP-CC3301 or BP-CC3351, since both are functionally similar. The BP-CC3351 differs by the addition of Dual-Band (2.4GHz and 5GHz) Wi-Fi 6 feature, as such the diplexer (U1) and the CC3351 companion device are populated.

Device Part Numbers
  • CC3300 - 2.4Ghz Wi-Fi 6
  • CC3301 - 2.4Ghz Wi-Fi 6 and Bluetooth ® Low Energy
  • CC3350 - 2.4/5Ghz (Dual-Band) Wi-Fi 6
  • CC3351 - 2.4/5Ghz (Dual-Band) Wi-Fi 6 and Bluetooth ® Low Energy
BP_TopView

Fig. 11 Top View of BP-CC33X1

This kit can be used in three configurations:

  1. RF-testing with PC tools: BP-CC33X1 + LP-XDS110ET (refer to Communication Setup for Radio Tool with LP-XDS110ET)
  2. MCU and RTOS evaluation: BP-CC33X1 + LaunchPad with the MCU running TCP/IP like the LP-AM243
  3. Proccessor and Linux evaluation: BP-CC33X1 + BP-CC33-BBB-ADAPT + BEAGL-BONE-BLACK

In addition, the BP-CC33X1 can also be wired to any other Linux or RTOS host board running TCP/IP stack.

BP-CC33X1 Hardware Features

The figures below show the overview and functional block diagram for the BP-CC33X1.

BP_overview

Fig. 12 BP-CC3351 Overview

Block_diagram

Fig. 13 BP-CC3351 Block diagram

  • CC3351 Dual-Band (2.4GHz and 5GHz) Wi-Fi 6 and Bluetooth ® Low Energy combo device
  • Two 20-pin stackable connectors (BoosterPack Standard)
  • Onboard chip Dual-Band antenna
  • SMA/U.FL connector for conducted RF testing
  • Power from on board dual rail (3.3 V and 1.8 V) LDO using USB or LaunchPad ™
  • 3 level shifters for voltage translation (3.3 V to 1.8 V)
  • JTAG header pins for SWD interface with XDS110 or LP-XDS110ET
  • Jumper for current measurement on both power supplies (3.3 V and 1.8 V) with provision to mount 0.1 ohm (0603) resistors for measurement with voltmeter
  • 32 kHz oscillator for lower power evaluation

Connector and Jumper Descriptions

Jumper Settings

The table below lists the jumper settings. To reference the default jumper configurations, see Fig. 12.

Table 13 Jumper Settings
Reference Usage Comments
J1, J2 RF Testing SMA connector (J1) or U.FL connector (J2) for condcuted testing in the lab. See Performing Conducted Testing on BP-CC33X1 section.
J6,J8 Power to board Used to enable power to board for both supplies. Refer to the Power section.
J15, J16 Current Measurment Used to measure power to device only. See Measure the CC33X1 Current draw section.
J7 USB Micro-B connector For providing external power to the BoosterPack ™
J10, J11 JTAG connectors Headers to interface with XDS110 debug probe. Refer to the JTAG Headers section.
J9 20-pin header (J11) 5V power Enables 5V power supply to come from LP-XDS110ET.
J12, J13, J14 Level shifter host voltage Should be set to 3.3V or 1.8V for enabling relevant level shifters to translate to correct host voltage level.
P1, P2 BoosterPack ™ header 2x20 pin headers each connected to BoosterPack ™. See BoosterPack ™ Header Assignment section.

BP-CC33X1 LED’s

The Table below lists the LED descriptions

Table 14 LEDs
Reference Color Usage Comments
D4 Green 3.3V power indication
On: 3.3V power rail is up,
Off: no 3.3V power supplied
D6 Red 1.8V power indication
On: 1.8V power rail is up,
Off: no 1.8V power supplied
D5 Yellow nReset The LED indicates the state of the nReset pin. If that LED is on, the device is functional which means the nReset is high.

The figure below shows the mentioned LEDs on the board.

LEDs

Fig. 14 LEDs D4 & D6

BoosterPack ™ Header Assignment

The CC33X1 BoosterPack ™ has 2x20 pin connectors that provide access to many of the device pins and features. The signal assignment on these 2x20 pin connectors is shown in the figure below and described in the following tables.

BP_pinout

Fig. 15 BP-CC33X1 BoosterPack ™ Header pinout

Table 15 P1 Header pin assignment
Pin Signal Name (in schematic) Type/direction Description
P1.1 VCC_MCU_3V3 Input No functional purpose
P1.2 Reserved N/A N/A
P1.3 UART_TX_3V3 (from CC33X1) Output The CC33X1 UART TX to host for BLE host controller interface
P1.4 UART_RX_3V3 (to CC33X1) Input The CC33X1 UART RX to host for BLE host controller interface
P1.5 LP_RESET Input Reset line for CC33X1 used to enabling/ disabling (active low). Driven by host through LaunchPad pins.
P1.6 Reserved N/A N/A
P1.7 SDIO_CLK_3V3 Input SDIO clock or SPI clock. Must be driven by host
P1.8 IRQ_WL_3V3 Output Interrupt request from CC33X1 to host for Wi-Fi ™ activity
P1.9 COEX_GRANT_3V3 Output External coexistence interface - grant (reserved for future use)
P1.10 ANT_SEL_3V3 Output Antenna select control
P1.21 VCC_MCU_5V Power 5V supply to board
P1.22 GND GND Board ground
P1.23 Reserved N/A N/A
P1.24 Reserved N/A N/A
P1.25 Reserved N/A N/A
P1.26 Reserved N/A N/A
P1.27 Reserved N/A N/A
P1.28 Reserved N/A N/A
P1.29 COEX_REQ_3V3 Input External coexistence interface - request (reserved for future use)
P1.30 COEX_PRIORITY_3V3 Input External coexistence interface - priority (reserved for future use)
Table 16 P2 Header pin assignment
Pin Signal Name (in schematic) Type/direction Description
P2.11 IRQ_BLE_3V3 Output Interrupt request from CC33X1 to host for BLE activity
P2.12 Reserved N/A N/A
P2.13 Reserved N/A N/A
P2.14 SDIO_D0_3V3 (POCI) Input/Output SDIO data D0 or SPI POCI
P2.15 SDIO_CMD_3V3 (PICO) Input/Output SDIO command or SPI PICO
P2.16 Reserved N/A N/A
P2.17 FAST_CLK_REQ_3V3 Output Fast clock request from CC33X1 to host
P2.18 SDIO_D3_3V3 (CS) Input/Ouput SDIO data D3 or SPI CS
P2.19 SLOW_CLK_IN_3V3 Input Input for external RTC clock 32.768 kHz
P2.20 GND GND Board ground
P2.31 Reserved N/A N/A
P2.32 Reserved N/A N/A
P2.33 Reserved N/A N/A
P2.34 LOGGER_3V3 Output Tracer from CC33X1 (UART TX debug logger)
P2.35 Reserved N/A N/A
P2.36 UART_RTS_3V3 (from CC33X1) Output UART RTS from CC33X1 to host for BLE HCI flow control
P2.37 UART_CTS_3V3 (to CC33X1) Input UART CTS to CC33X1 from host for BLE HCI flow control
P2.38 SDIO_D1_3V3 Input/Output SDIO data D1
P2.39 SDIO_D2_3V3 Input/Output SDIO data D2
P2.40 Reserved N/A N/A

JTAG Headers

The BP-CC33X1 was designed with 2 JTAG headers (J10, J11) for SWD interface with the XDS110 debug probe. The signal assignment for these headers are described in the figures and tables below.

The main JTAG interface for the BP-CC33X1 is via the LP-XDS110ET that will be connected to the 20pin header (J11).

JTAG_20-pin

Fig. 16 20-pin header(J11) for connecting LP-XDS110ET

Table 17 20-pin header(J11) assignment
Pin Signal Name Description
J11.6 SWCLK Serial wire clock
J11.8 SWDIO Serial wire data in/out
J11.10 RESET_1V8 nReset (Enable line for the CC33X1)
J11.12 UART_TX_1V8 The CC33X1 UART TX to host for BLE host controller interface
J11.14 UART_RX_1V8 The CC33X1 UART RX from host for BLE host controller interface
J11.16 VCC_BRD_1V8 1.8V supply for reference voltage to connector
J11.18 VCC_BRD_5V 5V supply to BP-CC33X1 from LP-XDS110ET
J11.1, J11.7, J11.13, J11.19, J11.20 GND Board ground

To use the ARM 10-pin header (J10) it must be aquired separately and soldered on the board, and aquire a 10-pin JTAG cable . In the figure below you can see this component populated on the BP-CC33X1 and its pinout.

../_images/BP-JTAG_10-pin1.png

Fig. 17 ARM 10 pin JTAG connector (J10)

Table 18 ARM 10 pin JTAG connector (J10) assignment
Pin Signal Name Description
J10.1 VCC_BRD_1V8 1.8V supply for reference voltage to XDS110
J10.2 SWDIO Serial wire data in/out
J10.4 SWCLK Serial wire clock
J10.10 RESET_1V8 nReset (Enable line for the CC33X1)
J10.3, J10.5, J10.7, J10.9 GND Board ground

Power

The board is designed to accept power from a connected LaunchPad ™ kit. Some LaunchPad kits cannot source the peak current requirements for Wi-Fi ™ , which could be as high as 500 mA. In such cases, the USB connector (J7) on the BP-CC33X1 can be used to aid in extra current. The use of Schottky diodes ensure that load sharing occurs between the USB connectors on the LaunchPad kit and the BoosterPack ™ module without any board modifications. The jumpers labeled J6 (1.8v) and J8 (3.3v) can be used to measure the total current consumption of the board from the onboard LDO.

Measure the CC33X1 Current Draw

Low Current Measurement (LPDS)

To measure the current draw of the CC33X1 device for both power supplies (3.3v or 1.8v), a jumper labeled J16 (for 3.3v supply) and a jumper labeled J15 (for 1.8v supply) is provided on the board. By removing J16, users can place an ammeter into this path to observe the current on the 3.3 V supply (see left side of Fig. 18 ) . The same process can be used for observing the current on the 1.8v supply with J15 (see right side of Fig. 18 ) . TI recommends this method for measuring the LPDS.

Ammeter

Fig. 18 Low Current measurement

Active Current Measurement

To measure active current in a profile form, TI recommends using a 0.1 ohm 1% 0603 resistor on the board, and measuring the differential voltage across the resistor. This measurement can be done using a voltmeter or an oscilloscope for measuring the current profile for both power supplies (3.3 V or 1.8 V). Jumper J15 is removed and a 0.01 resistor is populated in parallel to measure the active currents on the 1.8V supply (see left side of Fig. 19) . Similar operation with J16 and 3.3V supply (see right side of Fig. 19).

voltmeter

Fig. 19 Active Current Measurement

Clocking

The BP-CC33X1 provides two clock inputs to the CC33X1 device:

  • Y1 is a 40 MHz crystal for fast clock input
  • Y2 is a 32.768 kHz oscillator for slow clock input

If the user desires to provide their own external slow clock through the Slow Clock Input pin (refer to P2.19 seen on Fig. 15) some re-work must be performed. The 32.768 kHz oscillator (Y2) component should be removed, and a 0201 sized 0 ohm resistor should be populated on the footprint for R29, refer to Fig. 20 below.

slow_clk

Fig. 20 Rework for use of external slow clock

Hint

The slow clock can also be generated internally from the device, thus reducing system cost by removing the oscillator (Y2). The tradeoff of not having the oscillator is a degradation in power consumption when connected to an AccessPoint.

CC33X1 BoosterPack ™ Hardware Setup

Performing Conducted Testing on BP-CC33X1

As seen in the figure below, the BP-CC33X1 has an onboard SMA connector and chip antenna. The SMA connector (J1) provides a way for testing conducted measurements. Alternately, a trackpad for an UF.L connector (J2) is provided to replace the SMA connector and provide a second option for testing in the lab with a compatible cable (see right side of figure below).

RF_route

Fig. 21 RF Path on BP-CC33X1

Rework may be needed before using the connector on J1/J2. This involves swapping the position of the existing 3.9 pF capacitor to lead the transmission line to the desired connection (see figure above).

Communication Setup for Radio Tool with LP-XDS110ET

The LP-XDS110ET enables direct communication to the CC33X1 device via the SWD interface. This allows external tools, such as Radio Tool from the SimpleLink ™ Wi-Fi Toolbox (refer to SimpleLink Wi-Fi Toolbox Startup Guide), to send commands directly to the device without the use of an embedded host.

To use the LP-XDS110ET with the BP-CC33X1 connect the 20-pin connector (J11) on the BP-CC33X1 to the corresponding connector on the LP-XDS110ET (see figure below). Make sure that the jumper on the LP-XDS110 (labeled TGT VDD) is in the EXT. configuration, shown in the figure below. This verifies that the target voltage for the JTAG signals are sourced from the BP-CC33X1 (which is 1.8V) instead of the default LP-XDS110 target voltage (3.3V).

Warning

Power supply for the BP-CC33X1 comes from the LP-XDS110ET, but there can be usage scenarios where additional current is needed from the USB connection (J7). As such we recommend to provide external power from the USB connection (J7) for peak performance.

../_images/LP-XDS110_toBP-CC33X1.png

Fig. 22 BP-CC33X1 connected to LP-XDS110ET

Hint

If there are problems with the computer recognizing the XDS110 Debug Probe, download and install the “XDS110 Support Utilities package” (currently on release 7.0.100.1) at XDS Emulation Software (EMUPack) Download .

Alternatively installing or updating Code Composer Studio™ (IDE) may also add the necessary drivers.

Setup for BP-CC33X1 with MCU platform

The BP-CC33X1 can be used with a MCU running TCP/IP, like the LP-AM243 . and can easily integrate with the LaunchPad by stacking the 40 pin headers, as shown in Fig. 23 below .

../_images/BP+LP-AM243.jpg

Fig. 23 BP-CC33X1 stacked with LP-AM243

Setup for BP-CC33X1 with MPU platform

The BP-CC33X1 can integrate with a host platform running Linux OS, like the BeagleBone Black (BBB). The BeagleBone Black is a low-cost, community-supported development platform as shown below.

To interface with the BP-CC33X1 with the BeagleBone Black, the user also needs the BP-CC33X1 to BBB Adapter Board

../_images/1-BeagleBoneBlack.png

Fig. 24 Adapter board for the BeagleBone Black

../_images/2-BBB+BP-CC33X1_TopView.png

Fig. 25 Top view of BP-CC33X1 + BBB with adapter board

If having issues with BeagleBoneBlack and BP-CC33X1 make sure all boards are firmly pressed together to have best pin contact.

../_images/3-BBB+BP-CC33X1_sideView.png

Fig. 26 Side view of BP-CC33X1 and BBB with adapter board

To make sure the BeagleBone Black (BBB) boots up from the SD card TI recommends performing the following soldering re-work:

  1. Remove the 100k Ohm R68 resistor seen on the bottom of the BBB ( refer to Fig. 27 ).
  2. Then populate it at R93 on top of the BBB ( refer to Fig. 28 ).
Bottom View of modified BeagleBone Black

Fig. 27 Bottom View of modified BBB

TopView of modified BBB

Fig. 28 Top View of modified BBB

Lastly, adding a right angle header on the bottom of the BBB to easily connect the FTDI cable is optional. When the adapter board is attached to the BBB, the FTDI cable can get pinched between the BBB and adapter board, which can cause communication problems. (see figure below).

Hint

Alternatively, the user can press and hold the SW2 button on the BeagleBone board during power up if the hardware modifications were not made.

For more resources on software setup go to CC33XX software page.