TPS23861 Power over Ethernet  0.0.2
Software Application Programming Interface for Command and Control of the TI TPS23861 PSE Controller
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Pages
C:/Users/a0207881/workspace_v5_2/PowerOverEthernet/TPS23861.h
Go to the documentation of this file.
1 /**************************************************************************************************************************************************
10 /**************************************************************************************************************************************************
11 * Copyright © 2013 Texas Instruments Incorporated - http://www.ti.com/ *
12 ***************************************************************************************************************************************************
13 * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: *
14 * *
15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. *
16 * *
17 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the *
18 * documentation and/or other materials provided with the distribution. *
19 * *
20 * Neither the name of Texas Instruments Incorporated nor the names of its contributors may be used to endorse or promote products derived *
21 * from this software without specific prior written permission. *
22 * *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
29 ***************************************************************************************************************************************************
30 * MODULE CHANGE LOG *
31 * *
32 * Date Changed: {date of change} Developer: {developer name} *
33 * Change Description: {describe change} *
34 * *
35 **************************************************************************************************************************************************/
36 
37 #ifndef __TPS23861_H_
38 #define __TPS23861_H_
39 
40 #define TPS_SUCCESSFUL 0x00
41 #define TPS_ERR_PORT_IN_USE 0x80
42 #define TPS_ERR_PORT_NOT_IN_USE 0x81
43 #define TPS_ERR_NO_PORT_AVAILABLE 0x82
44 #define TPS_ERR_I2C_ERROR 0x83
45 
46 #define TPS_GIVE_ME_NEXT_PORT_AVAILABLE 0xff
47 #define TPS_PORT_NOT_REGISTERED_VALUE 0xff
48 
49 #define SWIZZLE_BYTES(x) {unsigned short y; y = x; x = (((y & 0xff) << 8) | (y >> 8)); }
50 
51 #define TPS_MAX_SYSTEM_PORTS 64
52 
53 typedef enum {
54  TPS_OFF = 0x0,
55  TPS_ON = 0x1
57 
60 typedef enum {
66 
68 typedef struct {
69  unsigned char Port_1 : 1;
70  unsigned char Port_2 : 1;
71  unsigned char Port_3 : 1;
72  unsigned char Port_4 : 1;
73  unsigned char Reserved_100 : 4;
75 
76 typedef struct {
77  unsigned int i2cAddress;
80 
81 
82 #define PORT_1_VALUE 0x1
83 #define PORT_2_VALUE 0x2
84 #define PORT_3_VALUE 0x4
85 #define PORT_4_VALUE 0x8
86 
87 
88 
89 
90 
91 
92 typedef struct {
93  unsigned char PEC_Power_Enable_Change : 1;
94  unsigned char PGC_Power_Good_Change : 1;
95  unsigned char DISF_Disconnect_Event : 1;
96  unsigned char DETC_Detection_Cycle : 1;
97  unsigned char CLASC_Classification_Cycle : 1;
98  unsigned char IFAULT_ICUT_ILIM_Fault : 1;
99  unsigned char INRF_Inrush_Fault : 1;
100  unsigned char SUPF_Supply_Event_Fault : 1;
102 
103 #define PEC 0x01
104 #define PGC 0x02
105 #define DISF 0x04
106 #define DETC 0x08
107 #define CLASC 0x10
108 #define IFAULT 0x20
109 #define INRF 0x40
110 #define SUPF 0x80
111 
112 
113 
114 
115 
116 typedef struct {
117  unsigned char PEMSK_Power_Enable_Unmask : 1;
118  unsigned char PGMSK_Power_Good_Unmask : 1;
119  unsigned char DIMSK_Disconnect_Unmask : 1;
120  unsigned char DEMSK_Detection_Cycle_Unmask : 1;
121  unsigned char CLMSK_Classificiation_Cycle_Unmask : 1;
122  unsigned char IFMSK_IFAULT_Unmask : 1;
123  unsigned char INMSK_Inrush_Fault_Unmask : 1;
124  unsigned char SUMSK_Supply_Event_Fault_Unmask : 1;
126 
127 #define PEMSK 0x01
128 #define PGMSK 0x02
129 #define DIMSK 0x04
130 #define DEMSK 0x08
131 #define CLMSK 0x10
132 #define IFMSK 0x20
133 #define INMSK 0x40
134 #define SUMSK 0x80
135 
136 
137 
138 
139 
140 typedef struct {
141  unsigned char PEC1_Power_Enable_Port_1_Event : 1;
142  unsigned char PEC2_Power_Enable_Port_2_Event : 1;
143  unsigned char PEC3_Power_Enable_Port_3_Event : 1;
144  unsigned char PEC4_Power_Enable_Port_4_Event : 1;
145  unsigned char PGC1_Power_Good_Port_1_Event : 1;
146  unsigned char PGC2_Power_Good_Port_2_Event : 1;
147  unsigned char PGC3_Power_Good_Port_3_Event : 1;
148  unsigned char PGC4_Power_Good_Port_4_Event : 1;
150 
151 #define PEC1 0x01
152 #define PEC2 0x02
153 #define PEC3 0x04
154 #define PEC4 0x08
155 #define PGC1 0x10
156 #define PGC2 0x20
157 #define PGC3 0x40
158 #define PGC4 0x80
159 
160 #define POWER_GOOD_EVENT_SHIFT 0
161 #define POWER_ENABLE_EVENT_SHIFT 4
162 
167 typedef struct {
168  unsigned char DETC1_Detection_Cycle_Port_1_Event : 1;
169  unsigned char DETC2_Detection_Cycle_Port_2_Event : 1;
170  unsigned char DETC3_Detection_Cycle_Port_3_Event : 1;
171  unsigned char DETC4_Detection_Cycle_Port_4_Event : 1;
172  unsigned char CLSC1_Classification_Cycle_Port_1_Event : 1;
173  unsigned char CLSC2_Classification_Cycle_Port_2_Event : 1;
174  unsigned char CLSC3_Classification_Cycle_Port_3_Event : 1;
175  unsigned char CLSC4_Classification_Cycle_Port_4_Event : 1;
177 
178 #define DETC1 0x01
179 #define DETC2 0x02
180 #define DETC3 0x04
181 #define DETC4 0x08
182 #define CLSC1 0x10
183 #define CLSC2 0x20
184 #define CLSC3 0x40
185 #define CLSC4 0x80
186 
187 #define DETECTION_EVENT_SHIFT 0
188 #define CLASSIFICATION_EVENT_SHIFT 4
189 
194 typedef struct {
195  unsigned char ICUT1_ICUT_Fault_Port_1_Event : 1;
196  unsigned char ICUT2_ICUT_Fault_Port_2_Event : 1;
197  unsigned char ICUT3_ICUT_Fault_Port_3_Event : 1;
198  unsigned char ICUT4_ICUT_Fault_Port_4_Event : 1;
199  unsigned char DISF1_Disconnect_Port_1_Event : 1;
200  unsigned char DISF2_Disconnect_Port_2_Event : 1;
201  unsigned char DISF3_Disconnect_Port_3_Event : 1;
202  unsigned char DISF4_Disconnect_Port_4_Event : 1;
204 
205 #define ICUT1 0x01
206 #define ICUT2 0x02
207 #define ICUT3 0x04
208 #define ICUT4 0x08
209 #define DISF1 0x10
210 #define DISF2 0x20
211 #define DISF3 0x40
212 #define DISF4 0x80
213 
214 #define ICUT_EVENT_SHIFT 0
215 #define DISCONNECT_EVENT_SHIFT 4
216 
221 typedef struct {
222  unsigned char INR1_Inrush_Fault_Port_1_Event : 1;
223  unsigned char INR2_Inrush_Fault_Port_2_Event : 1;
224  unsigned char INR3_Inrush_Fault_Port_3_Event : 1;
225  unsigned char INR4_Inrush_Fault_Port_4_Event : 1;
226  unsigned char ILIM1_Limit_Output_Current_Port_1_Event : 1;
227  unsigned char ILIM2_Limit_Output_Current_Port_2_Event : 1;
228  unsigned char ILIM3_Limit_Output_Current_Port_3_Event : 1;
229  unsigned char ILIM4_Limit_Output_Current_Port_4_Event : 1;
231 
232 #define INR1 0x01
233 #define INR2 0x02
234 #define INR3 0x04
235 #define INR4 0x08
236 #define ILIM1 0x10
237 #define ILIM2 0x20
238 #define ILIM3 0x40
239 #define ILIM4 0x80
240 
241 #define INRUSH_EVENT_SHIFT 0
242 #define ILIM_EVENT_SHIFT 4
243 
244 
249 typedef struct {
250  unsigned char Reserved_1 : 4;
251  unsigned char VPUV_VPower_Undervoltage_Event : 1;
252  unsigned char VDUV_Vdd_UVLO_Event : 1;
253  unsigned char Reserved_2 : 1;
254  unsigned char TSD_Thermal_Shutdown_Event : 1;
256 
257 #define VPUV 0x10
258 #define VDUV 0x20
259 #define TSD 0x80
260 
267 typedef struct {
268  unsigned char Detect : 4;
269  unsigned char Class : 4;
271 
273 typedef enum {
275  CLASS_1 = 0x1,
276  CLASS_2 = 0x2,
277  CLASS_3 = 0x3,
278  CLASS_4 = 0x4,
279  CLASS_0 = 0x6,
282  CLASS_5 = 0x9
284 
286 typedef enum {
299 
300 
301 #define DETECT 0x0F
302 #define CLASS 0xF0
303 #define CLASS_SHIFT 4
304 #define DETECT_SHIFT 0
305 #define GET_DETECT(x) (x & 0xF)
306 #define GET_CLASS(x) (x>>8)
307 
308 
313 typedef struct {
314  unsigned char PE1_Power_Enable_Port_1_Status : 1;
315  unsigned char PE2_Power_Enable_Port_2_Status : 1;
316  unsigned char PE3_Power_Enable_Port_3_Status : 1;
317  unsigned char PE4_Power_Enable_Port_4_Status : 1;
318  unsigned char PG1_Power_Good_Port_1_Status : 1;
319  unsigned char PG2_Power_Good_Port_2_Status : 1;
320  unsigned char PG3_Power_Good_Port_3_Status : 1;
321  unsigned char PG4_Power_Good_Port_4_Status : 1;
323 
324 #define PE1_STATUS 0x01
325 #define PE2_STATUS 0x02
326 #define PE3_STATUS 0x04
327 #define PE4_STATUS 0x08
328 #define PG1_STATUS 0x10
329 #define PG2_STATUS 0x20
330 #define PG3_STATUS 0x40
331 #define PG4_STATUS 0x80
332 #define POWER_ENABLE_STATUS (PE1_STATUS + PE2_STATUS + PE3_STATUS + PE4_STATUS)
333 #define POWER_GOOD_STATUS (PG1_STATUS + PG2_STATUS + PG3_STATUS + PG4_STATUS)
334 #define GET_POWER_ENABLE_STATUS(x) (x & POWER_ENABLE_STATUS)
335 #define GET_POWER_GOOD_STATUS(x) (x >> 8)
336 
341 typedef struct {
342  unsigned char I2C_slave_address : 7;
343  unsigned char Auto : 1;
345 
346 #define AUTO_BIT 0x80
347 #define I2C_ADDRESS_MASK 0x7F
348 
349 #define TPS238X_ALERT_RESPONSE_ADDRESS 0x0C
350 #define TPS238X_BROADCAST_ADDRESS 0x30
351 #define TPS238X_UNLOCK_CODE 0xAA
352 
353 
354 
355 
356 typedef struct {
357  unsigned char Port_1_Operating_Mode : 2;
358  unsigned char Port_2_Operating_Mode : 2;
359  unsigned char Port_3_Operating_Mode : 2;
360  unsigned char Port_4_Operating_Mode : 2;
362 
364 typedef enum {
370 
371 #define OPERATING_MODE_MASK 0x3
372 
373 #define OPERATING_PORT_1_MODE 0x03
374 #define OPERATING_PORT_2_MODE 0x0C
375 #define OPERATING_PORT_3_MODE 0x30
376 #define OPERATING_PORT_4_MODE 0xC0
377 
381 typedef struct {
382  unsigned char DCDE1_Disconnect_Enable_Port_1 : 1;
383  unsigned char DCDE2_Disconnect_Enable_Port_2 : 1;
384  unsigned char DCDE3_Disconnect_Enable_Port_3 : 1;
385  unsigned char DCDE4_Disconnect_Enable_Port_4 : 1;
386  unsigned char Reserved_3 : 4;
388 
389 #define DCDE1 0x01
390 #define DCDE2 0x02
391 #define DCDE3 0x04
392 #define DCDE4 0x08
393 
394 
395 
396 
397 
398 
399 
400 
401 
402 
403 typedef struct {
404  unsigned char DETE1_Detection_Enable_Port_1 : 1;
405  unsigned char DETE2_Detection_Enable_Port_2 : 1;
406  unsigned char DETE3_Detection_Enable_Port_3 : 1;
407  unsigned char DETE4_Detection_Enable_Port_4 : 1;
408  unsigned char CLE1_Classification_Enable_Port_1 : 1;
409  unsigned char CLE2_Classification_Enable_Port_2 : 1;
410  unsigned char CLE3_Classification_Enable_Port_3 : 1;
411  unsigned char CLE4_Classification_Enable_Port_4 : 1;
413 
414 #define DETE1 0x01
415 #define DETE2 0x02
416 #define DETE3 0x04
417 #define DETE4 0x08
418 #define CLE1 0x10
419 #define CLE2 0x20
420 #define CLE3 0x40
421 #define CLE4 0x80
422 
423 
424 
425 
426 typedef struct {
427  unsigned char Reserved_4 : 4;
428  unsigned char FSE1_Fast_Shutdown_Enable_Port_1 : 1;
429  unsigned char FSE2_Fast_Shutdown_Enable_Port_2 : 1;
430  unsigned char FSE3_Fast_Shutdown_Enable_Port_3 : 1;
431  unsigned char FSE4_Fast_Shutdown_Enable_Port_4 : 1;
433 
434 #define FSE1 0x10
435 #define FSE2 0x20
436 #define FSE3 0x40
437 #define FSE4 0x80
438 
439 #define FSE_SHIFT 4
440 
444 typedef struct {
445  unsigned char TDIS_Time_Disconnect_Delay : 2;
446  unsigned char TICUT_ICUT_Fault_Timing : 2;
447  unsigned char TSTART_Start_Time : 2;
448  unsigned char TLIM_ILIM_Fault_Timing : 2;
450 
452 typedef enum {
453  TLIM_60_MS = 0x0,
454  TLIM_30_MS = 0x1,
455  TLIM_15_MS = 0x2,
456  TLIM_10_MS = 0x3
458 
460 typedef enum {
461  TSTART_60_MS = 0x0,
462  TSTART_30_MS = 0x1,
465 
467 typedef enum {
468  TICUT_60_MS = 0x0,
469  TICUT_30_MS = 0x1,
470  TICUT_120_MS = 0x2,
473 
475 typedef enum {
476  TDIS_360_MS = 0x0,
477  TDIS_90_MS = 0x1,
478  TDIS_180_MS = 0x2,
479  TDIS_720_MS = 0x3
481 
482 
483 #define TDIS_MASK 0x3
484 #define TDIS_SHIFT 0x0
485 
486 #define TICUT_MASK 0xC
487 #define TICUT_SHIFT 0x2
488 
489 #define TSTART_MASK 0x30
490 #define TSTART_SHIFT 0x4
491 
492 #define TLIM_MASK 0xC0
493 #define TLIM_SHIFT 0x6
494 
498 typedef struct {
499  unsigned char _250M_Current_Sense_250_mOhm : 1;
500  unsigned char Reserved_5 : 3;
501  unsigned char MAINS_Detection_Voltage_Measurement_Duration : 1;
502  unsigned char Reserved_6 : 2;
503  unsigned char INTEN_INT_Pin_Mask : 1;
505 
506 #define _960_A_D_CONV_PER_SECOND 0x10
507 #define _800_A_D_CONV_PER_SECOND 0x00
508 
509 
510 #define _250M 0x01
511 #define MAINS 0x10
512 #define INTEN 0x80
513 
514 
515 
516 
517 
518 
519 
520 typedef struct {
521  unsigned char RDET1_Restart_Detection_Port_1 : 1;
522  unsigned char RDET2_Restart_Detection_Port_2 : 1;
523  unsigned char RDET3_Restart_Detection_Port_3 : 1;
524  unsigned char RDET4_Restart_Detection_Port_4 : 1;
525  unsigned char RCL1_Restart_Classification_Port_1 : 1;
526  unsigned char RCL2_Restart_Classification_Port_2 : 1;
527  unsigned char RCL3_Restart_Classification_Port_3 : 1;
528  unsigned char RCL4_Restart_Classification_Port_4 : 1;
530 
531 #define RDET1 0x01
532 #define RDET2 0x02
533 #define RDET3 0x04
534 #define RDET4 0x08
535 #define RCL1 0x10
536 #define RCL2 0x20
537 #define RCL3 0x40
538 #define RCL4 0x80
539 
540 #define RESTART_DETECTION_SHIFT 0
541 #define RESTART_DETECTION_MASK 0x0F
542 
543 #define RESTART_CLASSIFCATION_SHIFT 4
544 #define RESTART_CLASSIFCATION_MASK 0xF0
545 
550 
551 typedef struct {
552  unsigned char PWON1_Power_On_Port_1 : 1;
553  unsigned char PWON2_Power_On_Port_2 : 1;
554  unsigned char PWON3_Power_On_Port_3 : 1;
555  unsigned char PWON4_Power_On_Port_4 : 1;
556  unsigned char PWOFF1_Power_On_Port_1 : 1;
557  unsigned char PWOFF2_Power_On_Port_2 : 1;
558  unsigned char PWOFF3_Power_On_Port_3 : 1;
559  unsigned char PWOFF4_Power_On_Port_4 : 1;
561 
562 #define PWON1 0x01
563 #define PWON2 0x02
564 #define PWON3 0x04
565 #define PWON4 0x08
566 #define PWOFF1 0x10
567 #define PWOFF2 0x20
568 #define PWOFF3 0x40
569 #define PWOFF4 0x80
570 
571 #define POWER_OFF_SHIFT 4
572 #define POWER_OFF_MASK 0xF0
573 
574 #define POWER_ON_SHIFT 0
575 #define POWER_ON_MASK 0x0F
576 
580 typedef struct {
581  unsigned char RESP1_Reset_Port_1 : 1;
582  unsigned char RESP1_Reset_Port_2 : 1;
583  unsigned char RESP1_Reset_Port_3 : 1;
584  unsigned char RESP1_Reset_Port_4 : 1;
585  unsigned char RESAL_Reset_Registers : 1;
586  unsigned char Reserved_7 : 1;
587  unsigned char CLINP_Clear_Interrupt_Pin : 1;
588  unsigned char CLRAIN_Clear_Interrupt_Bits : 1;
590 
591 #define RESP1 0x01
592 #define RESP2 0x02
593 #define RESP3 0x04
594 #define RESP4 0x08
595 #define RESAL 0x10
596 #define CLINP 0x40
597 #define CLRAIN 0x80
598 
602 typedef struct {
603  unsigned char ICV_IC_Version_Number : 3;
604  unsigned char MFR_ID_Manufacture_ID_Number : 5;
606 
607 #define ICV 0x07
608 #define MFR_ID 0xF8
609 #define MFR_ID_SHIFT 3
610 #define MFR_ID_DEFAULT 0x0A // This is the the results in the MFR_ID section of the register
611 #define ICV_DEFAULT 0x00
612 #define ID_REGISTER_DEFAULT ((MFR_ID_DEFAULT<<MFR_ID_SHIFT) | ICV_DEFAULT)
613 
617 typedef struct {
618  unsigned char LEGMOD1_Legacy_Detect_Port_1 : 2;
619  unsigned char LEGMOD2_Legacy_Detect_Port_2 : 2;
620  unsigned char LEGMOD3_Legacy_Detect_Port_3 : 2;
621  unsigned char LEGMOD4_Legacy_Detect_Port_4 : 2;
623 
625 typedef enum {
630 
631 
632 #define LEGMOD1 0x03
633 #define LEGMOD2 0x0C
634 #define LEGMOD3 0x30
635 #define LEGMOD4 0xC0
636 
637 #define LEGACY_MODE_MASK 3
638 
639 #define LEGMOD1_SHIFT 0
640 #define LEGMOD2_SHIFT 2
641 #define LEGMOD3_SHIFT 4
642 #define LEGMOD4_SHIFT 6
643 
647 typedef struct {
648  unsigned char TECLEN1_Two_Event_Classification_Port_1 : 2;
649  unsigned char TECLEN2_Two_Event_Classification_Port_2 : 2;
650  unsigned char TECLEN3_Two_Event_Classification_Port_3 : 2;
651  unsigned char TECLEN4_Two_Event_Classification_Port_4 : 2;
653 
655 typedef enum {
661 
662 #define TECLEN1 0x03
663 #define TECLEN2 0x0C
664 #define TECLEN3 0x30
665 #define TECLEN4 0xC0
666 
667 #define TWO_EVENT_MASK 3
668 
669 #define TECLEN1_SHIFT 0
670 #define TECLEN2_SHIFT 2
671 #define TECLEN3_SHIFT 4
672 #define TECLEN4_SHIFT 6
673 
677 typedef struct {
678  unsigned char _4P12DIS_Disconnect_Mode_Four_Port_1_2 : 3;
679  unsigned char _4P12EN_Enable_Four_Port_Mode_1_2 : 1;
680  unsigned char _4P34DIS_Disconnect_Mode_Four_Port_3_4 : 3;
681  unsigned char _4P34EN_Enable_Four_Port_Mode_3_4 : 1;
683 
685 typedef enum {
692 
693 #define _4P12DIS 0x07
694 #define _4P12EN 0x08
695 #define _4P34DIS 0x70
696 #define _4P34EN 0x80
697 
698 #define FOUR_PAIR_DISCONNECT_MASK 7
699 
700 #define _4P12DIS_SHIFT 0
701 #define _4P12EN_SHIFT 3
702 
703 #define _4P34DIS_SHIFT 4
704 #define _4P34EN_SHIFT 7
705 
709 typedef struct {
710  unsigned char TMR_Timer_Period_10_ms : 4;
711  unsigned char CL5EN1_Class_5_Enable_Port_1 : 1;
712  unsigned char CL5EN2_Class_5_Enable_Port_2 : 1;
713  unsigned char CL5EN3_Class_5_Enable_Port_3 : 1;
714  unsigned char CL5EN4_Class_5_Enable_Port_4 : 1;
716 
717 #define TMR_MASK 0x0F
718 #define CL5EN1 0x10
719 #define CL5EN2 0x20
720 #define CL5EN3 0x40
721 #define CL5EN4 0x80
722 
723 #define CLASS_5_ENABLE_SHIFT 4
724 
728 typedef struct {
729  unsigned char DCTH1_Disconnect_Current_Threshold_Port_1 : 2;
730  unsigned char DCTH2_Disconnect_Current_Threshold_Port_2 : 2;
731  unsigned char DCTH3_Disconnect_Current_Threshold_Port_3 : 2;
732  unsigned char DCTH4_Disconnect_Current_Threshold_Port_4 : 2;
734 
736 typedef enum {
742 
743 #define DCTH1 0x03
744 #define DCTH2 0x0C
745 #define DCTH3 0x30
746 #define DCTH4 0xC0
747 
748 #define DISCONNECT_THRESHOLD_MASK 3
749 
750 #define DCTH1_SHIFT 0
751 #define DCTH2_SHIFT 2
752 #define DCTH3_SHIFT 4
753 #define DCTH4_SHIFT 6
754 
759 typedef struct {
760  unsigned char ICUT_Current_Threshold_Port_1 : 3;
761  unsigned char Reserved_8 : 1;
762  unsigned char ICUT_Current_Threshold_Port_2 : 3;
763  unsigned char Reserved_9 : 1;
765 
767 typedef enum {
771 
777 
778 #define ICUT_THRESHOLD_MASK 7
779 
780 #define ICUT_PORT_1 0x07
781 #define ICUT_PORT_2 0x70
782 
783 #define ICUT_PORT_1_SHIFT 0
784 #define ICUT_PORT_2_SHIFT 4
785 
790 
791 typedef struct {
792  unsigned char ICUT_Current_Threshold_Port_3 : 3;
793  unsigned char Reserved_10 : 1;
794  unsigned char ICUT_Current_Threshold_Port_4 : 3;
795  unsigned char Reserved_11 : 1;
797 
798 #define ICUT_PORT_3 0x07
799 #define ICUT_PORT_4 0x70
800 
801 #define ICUT_PORT_3_SHIFT 0
802 #define ICUT_PORT_4_SHIFT 4
803 
807 typedef struct {
808  unsigned char Temp_Value;
810 
811 #define CONVERT_TEMP(x) (-20.0 + (x*0.652))
812 
813 
814 
815 
816 
817 typedef union {
819  unsigned short Input_Voltage : 14;
820  unsigned short Reserved_12 : 2;
821  } Input_Voltage_Short;
822 
824  unsigned char Input_Voltage_LSB : 8;
825  unsigned char Input_Voltage_MSB : 6;
826  unsigned char Reserved_13 : 2;
827  } Input_Voltage_Char;
829 
830 typedef unsigned short TPS238x_Input_Voltage_t;
831 
832 
842 
843 typedef union {
845  unsigned short Port_Current : 14;
846  unsigned short Reserved_14 : 2;
847  } Port_Current_Short;
848 
850  unsigned char Port_Current_LSB : 8;
851  unsigned char Port_Current_MSB : 6;
852  unsigned char Reserved_15 : 2;
853  } Port_Current_Char;
855 
856 typedef unsigned short TPS238x_Port_Current_t;
857 
867 typedef union {
869  unsigned short Port_Voltage : 14;
870  unsigned short Reserved_16 : 2;
871  } Port_Voltage_Short;
872 
874  unsigned char Port_Voltage_LSB : 8;
875  unsigned char Port_Voltage_MSB : 6;
876  unsigned char Reserved_17 : 2;
877  } Port_Voltage_Char;
879 
880 typedef unsigned short TPS238x_Port_Voltage_t;
881 
885 
886 typedef struct {
887  unsigned char Reserved_18 : 4;
888  unsigned char POEP1_Foldback_Curve_Port_1 : 1;
889  unsigned char POEP1_Foldback_Curve_Port_2 : 1;
890  unsigned char POEP1_Foldback_Curve_Port_3 : 1;
891  unsigned char POEP1_Foldback_Curve_Port_4 : 1;
893 
895 typedef enum {
899 
900 #define POEP1 0x10
901 #define POEP2 0x20
902 #define POEP3 0x40
903 #define POEP4 0x80
904 
905 #define POE_PLUS_SHIFT 4
906 
910 typedef struct {
911  unsigned char WDS_Watchdog_Status : 1;
912  unsigned char IWD_I2C_Watchdog_Disable : 4;
913  unsigned char Reserved_19 : 3;
915 
916 #define WDS 0x01
917 #define IWD 0x1E
918 
919 #define IWD_SHIFT 1
920 #define IWD_MASK_VALUE 0xB
921 
922 
923 
924 
925 typedef struct {
926  unsigned char Reserved_20 : 5;
927  unsigned char IGATE_Gate_Pullup_Current : 1;
928  unsigned char CLDN_Fault_Cool_Down_Timer : 2;
930 
932 typedef enum {
937 
938 #define IGATE 0x20
939 #define CLDN_MASK 0xC0
940 
941 #define CLDN_SHIFT 6
942 
943 #define GATE_PULLUP_CURRENT_50_MICROAMP 0
944 #define GATE_PULLUP_CURRENT_25_MICROAMP 1
945 
956 
957 typedef union {
959  unsigned short Port_Detect_Resistance : 14;
960  unsigned short Detect_Status : 2;
961  } Port_Detect_Resistance_Short;
962 
964  unsigned char Port_Detect_Resistance_LSB : 8;
965  unsigned char Port_Detect_Resistance_MSB : 6;
966  unsigned char Detect_Status : 2;
967  } Port_Detect_Resistance_Char;
969 
970 typedef unsigned short TPS238x_Port_Detect_Resistance_t;
971 
972 // Determines the most recent detection result status. Used in tps_GetDetectResistance()
973 typedef enum {
979 
980 #define PORT_RESISTANCE_MASK_SHORT 0x3FFF
981 #define RS_MASK_SHORT 0xC000
982 #define RS_SHIFT_SHORT 13
983 
986 // Port 2 Detect Voltage Difference Register <br>
988 // Port 3 Detect Voltage Difference Register <br>
990 // Port 4 Detect Voltage Difference Register <br>
995 typedef union {
997  unsigned short Port_Voltage_Difference : 12;
998  unsigned short Voltage_Difference_Status : 4;
999  } Port_Voltage_Difference_Short;
1000 
1002  unsigned char Port_Voltage_Difference_LSB : 8;
1003  unsigned char Port_Voltage_Difference_MSB : 6;
1004  unsigned char Voltage_Difference_Status : 2;
1005  } Port_Voltage_Difference_Char;
1007 
1008 typedef unsigned short TPS238x_Port_Voltage_Difference_t;
1009 
1012 typedef enum {
1020 
1021 
1022 #define PORT_VOLTAGE_DIFFERENCE_MASK_SHORT 0x0FFF
1023 #define VDS_MASK_SHORT 0xF000
1024 #define VDS_SHIFT_SHORT 12
1025 
1027 #define CONVERT_PORT_NUM(x) (1 << ((uint8_t)x-1))
1028 
1029 
1030 /**********************************************************************
1031  I2C Commands for the TPS23861
1032 ***********************************************************************/
1033 
1034 // I2C Commands Values
1035 #define TPS238X_INTERRUPT_COMMAND 0x00
1036 #define TPS238X_INTERRUPT_MASK_COMMAND 0x01
1037 #define TPS238X_POWER_EVENT_COMMAND 0x02
1038 #define TPS238X_POWER_EVENT_CLEAR_COMMAND 0x03
1039 #define TPS238X_DETECTION_EVENT_COMMAND 0x04
1040 #define TPS238X_DETECTION_EVENT_CLEAR_COMMAND 0x05
1041 #define TPS238X_FAULT_EVENT_COMMAND 0x06
1042 #define TPS238X_FAULT_EVENT_CLEAR_COMMAND 0x07
1043 #define TPS238X_INRUSH_LIMIT_EVENT_COMMAND 0x08
1044 #define TPS238X_INRUSH_LIMIT_EVENT_CLEAR_COMMAND 0x09
1045 #define TPS238X_SUPPLY_EVENT_COMMAND 0x0A
1046 #define TPS238X_SUPPLY_EVENT_CLEAR_COMMAND 0x0B
1047 #define TPS238X_PORT_1_STATUS_COMMAND 0x0C
1048 #define TPS238X_PORT_2_STATUS_COMMAND 0x0D
1049 #define TPS238X_PORT_3_STATUS_COMMAND 0x0E
1050 #define TPS238X_PORT_4_STATUS_COMMAND 0x0F
1051 #define TPS238X_POWER_STATUS_COMMAND 0x10
1052 #define TPS238X_I2C_SLAVE_ADDRESS_COMMAND 0x11
1053 #define TPS238X_OPERATING_MODE_COMMAND 0x12
1054 #define TPS238X_DISCONNECT_ENABLE_COMMAND 0x13
1055 #define TPS238X_DETECT_CLASS_ENABLE_COMMAND 0x14
1056 #define TPS238X_PORT_POWER_PRIORITY_COMMAND 0x15
1057 #define TPS238X_TIMING_CONFIGURATION_COMMAND 0x16
1058 #define TPS238X_GENERAL_MASK_1_COMMAND 0x17
1059 #define TPS238X_DETECT_CLASS_RESTART_COMMAND 0x18
1060 #define TPS238X_POWER_ENABLE_COMMAND 0x19
1061 #define TPS238X_RESET_COMMAND 0x1A
1062 #define TPS238X_ID_COMMAND 0x1B
1063 
1064 #define TPS238X_TEST_ENABLE_COMMAND 0x1D
1065 
1066 #define TPS238X_LEGACY_DETECT_MODE_COMMAND 0x20
1067 #define TPS238X_TWO_EVENT_CLASSIFICATION_COMMAND 0x21
1068 #define TPS238X_FOUR_PAIR_MODE_COMMAND 0x22
1069 
1070 #define TPS238X_CLASS_FIVE_TIMER_ENABLE_COMMAND 0x27
1071 
1072 #define TPS238X_DISCONNECT_THRESHOLD_COMMAND 0x29
1073 #define TPS238X_ICUT21_CONFIGURATION_COMMAND 0x2A
1074 #define TPS238X_ICUT43_CONFIGURATION_COMMAND 0x2B
1075 #define TPS238X_TEMPERATURE_COMMAND 0x2C
1076 
1077 #define TPS238X_INPUT_VOLTAGE_COMMAND 0x2E
1078 #define TPS238X_INPUT_VOLTAGE_LSB_COMMAND 0x2E
1079 #define TPS238X_INPUT_VOLTAGE_MSB_COMMAND 0x2F
1080 
1081 #define TPS238X_PORT_1_CURRENT_COMMAND 0x30
1082 #define TPS238X_PORT_1_CURRENT_LSB_COMMAND 0x30
1083 #define TPS238X_PORT_1_CURRENT_MSB_COMMAND 0x31
1084 
1085 #define TPS238X_PORT_1_VOLTAGE_COMMAND 0x32
1086 #define TPS238X_PORT_1_VOLTAGE_LSB_COMMAND 0x32
1087 #define TPS238X_PORT_1_VOLTAGE_MSB_COMMAND 0x33
1088 
1089 #define TPS238X_PORT_2_CURRENT_COMMAND 0x34
1090 #define TPS238X_PORT_2_CURRENT_LSB_COMMAND 0x34
1091 #define TPS238X_PORT_2_CURRENT_MSB_COMMAND 0x35
1092 
1093 #define TPS238X_PORT_2_VOLTAGE_COMMAND 0x36
1094 #define TPS238X_PORT_2_VOLTAGE_LSB_COMMAND 0x36
1095 #define TPS238X_PORT_2_VOLTAGE_MSB_COMMAND 0x37
1096 
1097 #define TPS238X_PORT_3_CURRENT_COMMAND 0x38
1098 #define TPS238X_PORT_3_CURRENT_LSB_COMMAND 0x38
1099 #define TPS238X_PORT_3_CURRENT_MSB_COMMAND 0x39
1100 
1101 #define TPS238X_PORT_3_VOLTAGE_COMMAND 0x3A
1102 #define TPS238X_PORT_3_VOLTAGE_LSB_COMMAND 0x3A
1103 #define TPS238X_PORT_3_VOLTAGE_MSB_COMMAND 0x3B
1104 
1105 #define TPS238X_PORT_4_CURRENT_COMMAND 0x3C
1106 #define TPS238X_PORT_4_CURRENT_LSB_COMMAND 0x3C
1107 #define TPS238X_PORT_4_CURRENT_MSB_COMMAND 0x3D
1108 
1109 #define TPS238X_PORT_4_VOLTAGE_COMMAND 0x3E
1110 #define TPS238X_PORT_4_VOLTAGE_LSB_COMMAND 0x3E
1111 #define TPS238X_PORT_4_VOLTAGE_MSB_COMMAND 0x3F
1112 
1113 #define TPS238X_POE_PLUS_COMMAND 0x40
1114 #define TPS238X_FIRMWARE_REVISION_COMMAND 0x41
1115 #define TPS238X_I2C_WATCHDOG_COMMAND 0x42
1116 #define TPS238X_DEVICE_ID_COMMAND 0x43
1117 
1118 #define TPS238X_COOL_DOWN_GATE_DRIVE_COMMAND 0x45
1119 
1120 #define TPS238X_PORT_1_DETECT_RESISTANCE_COMMAND 0x60
1121 #define TPS238X_PORT_1_DETECT_RESISTANCE_LSB_COMMAND 0x60
1122 #define TPS238X_PORT_1_DETECT_RESISTANCE_MSB_COMMAND 0x61
1123 
1124 #define TPS238X_PORT_2_DETECT_RESISTANCE_COMMAND 0x62
1125 #define TPS238X_PORT_2_DETECT_RESISTANCE_LSB_COMMAND 0x62
1126 #define TPS238X_PORT_2_DETECT_RESISTANCE_MSB_COMMAND 0x63
1127 
1128 #define TPS238X_PORT_3_DETECT_RESISTANCE_COMMAND 0x64
1129 #define TPS238X_PORT_3_DETECT_RESISTANCE_LSB_COMMAND 0x64
1130 #define TPS238X_PORT_3_DETECT_RESISTANCE_MSB_COMMAND 0x65
1131 
1132 #define TPS238X_PORT_4_DETECT_RESISTANCE_COMMAND 0x66
1133 #define TPS238X_PORT_4_DETECT_RESISTANCE_LSB_COMMAND 0x66
1134 #define TPS238X_PORT_4_DETECT_RESISTANCE_MSB_COMMAND 0x67
1135 
1136 #define TPS238X_PORT_1_DETECT_VOLTAGE_DIFF_COMMAND 0x68
1137 #define TPS238X_PORT_1_DETECT_VOLTAGE_DIFF_LSB_COMMAND 0x68
1138 #define TPS238X_PORT_1_DETECT_VOLTAGE_DIFF_MSB_COMMAND 0x69
1139 
1140 #define TPS238X_PORT_2_DETECT_VOLTAGE_DIFF_COMMAND 0x6A
1141 #define TPS238X_PORT_2_DETECT_VOLTAGE_DIFF_LSB_COMMAND 0x6A
1142 #define TPS238X_PORT_2_DETECT_VOLTAGE_DIFF_MSB_COMMAND 0x6B
1143 
1144 #define TPS238X_PORT_3_DETECT_VOLTAGE_DIFF_COMMAND 0x6C
1145 #define TPS238X_PORT_3_DETECT_VOLTAGE_DIFF_LSB_COMMAND 0x6C
1146 #define TPS238X_PORT_3_DETECT_VOLTAGE_DIFF_MSB_COMMAND 0x6D
1147 
1148 #define TPS238X_PORT_4_DETECT_VOLTAGE_DIFF_COMMAND 0x6E
1149 #define TPS238X_PORT_4_DETECT_VOLTAGE_DIFF_LSB_COMMAND 0x6E
1150 #define TPS238X_PORT_4_DETECT_VOLTAGE_DIFF_MSB_COMMAND 0x6F
1151 
1152 
1153 /*************************************************************************************************************/
1154 /* PROTOTYPES */
1155 /*************************************************************************************************************/
1156 
1157 #ifdef __CPLUSPLUS
1158 extern "C" {
1159 #endif
1160 
1161 uint8_t tps_RegisterPort (uint16_t device_i2c_address, TPS238x_PortNum_t devicePortNum);
1162 uint16_t tps_GetDeviceI2CAddress (uint8_t systemPortNum);
1163 TPS238x_PortNum_t tps_GetDevicePortNum (uint8_t systemPortNum);
1164 uint8_t tps_GetSystemPortNumber (uint16_t deviceI2CAddress, TPS238x_PortNum_t devicePortNum);
1165 uint8_t tps_SetI2CAddresses (uint8_t temp_i2cAddress, uint8_t numDevices, uint8_t *list_ofAddresses, TPS238x_On_Off_t *list_ofAutoMode);
1166 uint8_t tps_SetDeviceInterruptMask (uint8_t device_i2c_address, TPS238X_Interrupt_Mask_Register_t intMask, uint8_t intDelayTime);
1167 uint8_t tps_GetDeviceInterruptMask (uint8_t device_i2c_address, TPS238X_Interrupt_Mask_Register_t *intMask, uint8_t *intDelayTime);
1168 uint8_t tps_GetDeviceInterruptStatus (uint8_t device_i2c_address, TPS238X_Interrupt_Register_t *status);
1169 uint8_t tps_GetDeviceAllInterruptEvents (uint8_t device_i2c_address,
1170  TPS238x_Ports_t *powerEnablePortEvents,
1171  TPS238x_Ports_t *powerGoodPortEvents,
1172  TPS238x_Ports_t *detectionPortEvents,
1173  TPS238x_Ports_t *classificationPortEvents,
1174  TPS238x_Ports_t *icutPortEvents,
1175  TPS238x_Ports_t *disconnectPortEvents,
1176  TPS238x_Ports_t *inrushPortEvents,
1177  TPS238x_Ports_t *ilimPortEvents,
1178  TPS238X_Supply_Event_Register_t *supplyEvents);
1179 uint8_t tps_GetPortDetectClassStatus (uint8_t systemPortNum, uint8_t *detectionStatus, uint8_t *classificationStatus);
1180 uint8_t tps_GetPortDetectionStatus (uint8_t systemPortNum, TPS238x_Detection_Status_t *detectionStatus);
1181 uint8_t tps_GetPortClassificationStatus (uint8_t systemPortNum, TPS238x_Classification_Status_t *classificationStatus);
1182 uint8_t tps_GetDevicePowerStatus (uint8_t device_i2c_address, TPS238x_Ports_t *powerEnablePorts, TPS238x_Ports_t *powerGoodPorts);
1183 uint8_t tps_GetDevicePowerEnableStatus (uint8_t device_i2c_address, TPS238x_Ports_t *powerEnablePorts);
1184 uint8_t tps_GetDevicePowerGoodStatus (uint8_t device_i2c_address, TPS238x_Ports_t *powerGoodPorts);
1185 uint8_t tps_GetPortPowerGoodStatus (uint8_t systemPortNum);
1186 uint8_t tps_SetDevicePowerOn (uint8_t device_i2c_address, TPS238x_Ports_t portsPoweredOn);
1187 uint8_t tps_SetDevicePowerOff (uint8_t device_i2c_address, TPS238x_Ports_t portsPoweredOff);
1188 uint8_t tps_SetPortPower (uint8_t systemPortNum, TPS238x_On_Off_t on_off);
1189 uint8_t tps_GetDeviceDetectionEnable (uint8_t device_i2c_address, TPS238x_Ports_t *detectPorts);
1190 uint8_t tps_GetPortDetectionEnable (uint8_t systemPortNum);
1191 uint8_t tps_GetDeviceClassificationEnable (uint8_t device_i2c_address, TPS238x_Ports_t *classPorts);
1192 uint8_t tps_GetPortClassificationEnable (uint8_t systemPortNum);
1193 uint8_t tps_GetDeviceDetectClassEnable (uint8_t device_i2c_address, TPS238x_Ports_t *detectPorts, TPS238x_Ports_t *classPorts);
1194 uint8_t tps_SetDeviceDetectClassEnable (uint8_t device_i2c_address, TPS238x_Ports_t detectPorts, TPS238x_Ports_t classPorts);
1195 uint8_t tps_SetPortDetectClassEnable (uint8_t systemPortNum, TPS238x_On_Off_t on_off_detect, TPS238x_On_Off_t on_off_class);
1196 uint8_t tps_GetDeviceDisconnectEnable (uint8_t device_i2c_address, TPS238x_Ports_t *disconnectPorts);
1197 uint8_t tps_SetDeviceDisconnectEnable (uint8_t device_i2c_address, TPS238x_Ports_t disconnectPorts);
1198 uint8_t tps_SetPortDisconnectEnable (uint8_t systemPortNum, TPS238x_On_Off_t on_off);
1199 uint8_t tps_SetDeviceTiming (uint8_t device_i2c_address, TPS238x_ILIM_Timing_t ilimTiming, TPS238x_TStart_Timing_t startTiming,
1200  TPS238x_TICUT_Timing_t icutTiming, TPS238x_TDIS_Timing_t disconnectTiming,
1201  TPS238x_Cool_Down_Timing_t coolDownFaultTiming);
1202 uint8_t tps_FastShutdownDeviceEnable (uint8_t device_i2c_address, TPS238x_Ports_t ports);
1203 uint8_t tps_FastShutdownPortEnable (uint8_t systemPortNum, TPS238x_On_Off_t on_off);
1204 uint8_t tps_ConfigPort (uint8_t systemPortNum, TPS238x_Operating_Modes_t operatingMode, TPS238x_Legacy_Detect_t legacyDetect,
1205  TPS238x_Two_Event_t twoEvent, TPS238x_On_Off_t class5Enable,
1206  TPS238x_Disconnect_Threshold_t disconnectThreshold, TPS238x_ICUT_Config_t icutCurrentThreshold,
1207  TPS238x_POE_Plus_Foldback_t poepFoldbackCurve);
1208 uint8_t tps_ConfigDevice4Pair (uint8_t device_i2c_address, TPS238x_On_Off_t on_off_Port12, TPS238x_Four_Pair_t disconnectModePort12,
1209  TPS238x_On_Off_t on_off_Port34, TPS238x_Four_Pair_t disconnectModePort34);
1210 uint8_t tps_RestartDeviceDetection (uint8_t device_i2c_address, TPS238x_Ports_t detectPorts);
1211 uint8_t tps_RestartPortDetection (uint8_t systemPortNum);
1212 uint8_t tps_RestartDeviceClassification (uint8_t device_i2c_address, TPS238x_Ports_t classPorts);
1213 uint8_t tps_RestartPortClassification (uint8_t systemPortNum);
1214 uint8_t tps_RestartDeviceDetectClass (uint8_t device_i2c_address, TPS238x_Ports_t detectPorts, TPS238x_Ports_t classPorts);
1215 uint8_t tps_ResetDevicePort (uint8_t systemPortNum);
1216 uint8_t tps_ResetPort (uint8_t systemPortNum);
1217 uint8_t tps_GetPortMeasurements (uint8_t systemPortNum, uint16_t *voltage, uint16_t *current);
1218 uint8_t tps_GetDeviceInputVoltage (uint8_t device_i2c_address, uint16_t *voltage);
1219 uint8_t tps_GetDeviceTemperature (uint8_t device_i2c_address, uint8_t *temperature);
1220 uint8_t tps_GetPortDetectResistance (uint8_t systemPortNum, uint16_t *detectResistance,
1221  TPS238x_Detect_Resistance_Status_t *detectResistanceStatus);
1222 uint8_t tps_GetPortDetectVoltageDifference (uint8_t systemPortNum, uint16_t *detectVoltageDiff,
1223  TPS238x_Detect_Voltage_Difference_Status_t *detectVoltageDiffStatus);
1224 uint8_t tps_ReleasePort (uint8_t systemPortNum);
1225 
1226 #ifdef __CPLUSPLUS
1227 }
1228 #endif
1229 
1230 
1231 #endif /* __TPS238X_H_ */