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{"sheet":"Design Information","index":0,"n_rows":261,"n_cols":12,"rows_kept":261,"cut":false,"hidden":false,"merged":[[15,1,15,7],[18,1,18,7],[17,1,17,7],[74,1,74,7],[16,1,16,7],[23,1,23,7],[32,1,32,7],[50,1,50,7],[59,1,59,7],[20,1,20,6],[56,1,56,6],[8,1,10,7],[12,1,12,2],[13,1,13,2],[1,1,1,6],[3,1,7,7],[109,1,109,7],[214,1,214,7],[226,1,226,7],[237,1,237,7],[247,1,247,7],[131,1,131,7],[158,1,158,7],[183,1,183,7],[199,1,199,7],[148,1,148,7]]}
[]
[null,"UCC28070 Interleaved CCM Boost-PFC Controller Set-Up Tool"]
[null,"TI Literature #"," SLUC114","Rev 2.0",null,null,null,null,null,"Unit","Value"]
[null,"Description: \nThis calculator aids in designing with the UCC28070A, UCC28070, and UCC28070-Q1 CCM Boost-PFC controllers.  Calculations in this Set-Up Tool follow the design procedure in UCC28070A data sheet SLUSAW0 rev-B.\nBest viewed at 80% or higher magnification.  Note constant items in cell columns J, K, and L, at right. \n\nThis Set-Up Tool is valid for 2-phase Interleaved CCM Boost-PFC only.  It is not valid for 4-phase interleaving, Bridgeless or Semi-Bridgeless PFC, Totempole-PFC, Buck-PFC, Buck-Boost-PFC, Boost-Follower, nor any other PFC topology.\nAlso, DC input voltage is not supported by this tool and designs using this tool for DC input voltage are not valid .  ",null,null,null,null,null,null,null,"mW = ",1E-3]
[null,null,null,null,null,null,null,null,null,"mA = ",1E-3]
[null,null,null,null,null,null,null,null,null,"µA = ",9.9999999999999995E-7]
[null,null,null,null,null,null,null,null,null,"µF = ",9.9999999999999995E-7]
[null,null,null,null,null,null,null,null,null,"mH = ",1E-3]
[null,"Disclaimer:\nSee 'Notice and Disclaimer' sheet for Important disclaimer information.",null,null,null,null,null,null,null,"µH = ",9.9999999999999995E-7]
[null,null,null,null,null,null,null,null,null,"pF = ",9.9999999999999998E-13]
[null,null,null,null,null,null,null,null,null,"kΩ = ",1000]
[null,null,null,null,null,null,null,null,null,"MΩ = ",1000000]
[null,"Enter design parameters into the YELLOW cells: ",null," ",null,null,null,null,null,"kHz = ",1000]
[null,"Calculated results appear in the GRAY cells: ",null," ",null,null,null,null,null,"µs = ",9.9999999999999995E-7]
[null,null,null,null,null,null,null,null,null,"VREF =",6,"V"]
[null,"Notifications ",null,null,null,null,null,null,null,"VREG =  ",3,"V"]
[null,"If any Error notification is visible (in red, bold text) the PFC design is invalid.  Some aspect of a valid design cannot be achieved using the existing input.  Valid designs should have no Error messages.",null,null,null,null,null,null,null,"gMC = ",1E-4,"A/V"]
[null,"If any Alert notification is visible (in red, bold text) the PFC design is valid, but verify that the alerted discrepancy is intentional.",null,null,null,null,null,null,null,"gMV = ",6.9999999999999994E-5,"A/V"]
[null,"If any Notice message is visible (in black, regular text), then the PFC design is valid, but extra design considerations may be helpful.",null,null,null,null,null,null,null,"ISS =",1.0000000000000001E-5,"A"]
[]
[null,"Overall PFC Design Targets",null,null,null,null,null,null,null,"NOTICE:"]
[null,"Design Parameters","Variable Names","Value","Unit","Note","Notifications","Comments",null,"The following assumptions must be true for successful PFC design using this Set-Up Tool: "]
[null," "," ",null," ",null,null,null,null,"1.  All yellow User-Input values have been changed by User from default example values to actual User values."]
[null,"Step 1:  Enter Input-Line Voltage and Frequency Parameters",null,null,null,null,null,null,null,"2.  Entry and selection values are reasonably close to the target values provided. "]
[null,null,null,null,null,null,null,null,null,"3.  The component values in both phases are identical.  No special unbalanced or assymmetrical configurations (electrically, not mechanically). "]
[null,"  Type of Input Voltage (AC only)","VIN_type = ","AC",null,null,null,null,null,"4.  Current Synthesis is enabled;  that is, RSYNTH input is not raised above 5V."]
[null,"è Enter Maximum Input Voltage ","VIN(max) = ",264,{"$f":"IF(VIN_type=\"AC\",\"Vrms\",IF(VIN_type=\"DC\",\"Vdc\",\"Error\"))","v":"Vrms"}]
[null,"è Enter Minimum Input Voltage ","VIN(min) = ",85,{"$f":"IF(VIN_type=\"AC\",\"Vrms\",IF(VIN_type=\"DC\",\"Vdc\",\"Error\"))","v":"Vrms"}]
[]
[null,"è Enter Maximum Input Line Frequency to PFC   ","fLINE(max) = ",63,"Hz",null,{"$f":"IF(fLINE_max>800,\"Error: Input frequency > 800Hz is not supported\",IF(fLINE_max>359,\"Alert: Higher avionics frequencies may show increased THDi\", IF(AND(VIN_type=\"AC\",fLINE_max=0), \"Error: AC input type may not have 0Hz\",IF(fLINE_max<0,\"Error: Negative frequencies are not allowed\",\"\"))))","v":""}]
[null,"è Enter Minimum Input Line Frequency to PFC","fLINE(min) = ",47,"Hz",null,{"$f":"IF(fLINE_min>fLINE_max,\"Error: minimum frequency must not be higher than maximum frequency\", IF(fLINE_min>800,\"Error: Input frequency > 800Hz is not supported\",IF(fLINE_min>359,\"Alert: Higher avionics frequencies may show increased THDi\", IF(AND(VIN_type=\"AC\",fLINE_min=0), \"Error: AC input type may not have 0Hz\",IF(fLINE_min<0,\"Error: Negative frequencies are not allowed\",\"\")))))","v":""}]
[]
[null,"Step 2:  Enter Output Voltage and Power Targets"]
[]
[null,"è Enter the target Nominal Output Voltage of PFC","VOUT(nom) (tgt) = ",390,"V",null,{"$f":"IF(VOUT_nom_tgt<VIN_max*1.4142,\"Error:  Output voltage target must be higher than peak of maximum input voltage.\",IF(VOUT_nom_tgt<(VIN_max*1.4142)/(1-0.15/tSW),\"Alert:  Vout(nom) should be higher to maintain a sufficient difference above the peak input voltage.\",\"\"))","v":""}]
[null,"è Enter the target peak-to-peak ripple Voltage on output","VOUT(ripple) (tgt) = ",11,"Vpkpk",null,null,"If unknown, it is suggested to keep pk-pk Vripple < 5% of Vout(nom)"]
[null,"è Enter Minimum Output Voltage (same as Hold-Up target at cell D134). ","VOUT(min) (tgt) = ",300,"V",null,"Notice: Consider possible peak inrush current on recovery from input voltage dip or drop-out."]
[]
[null,"è Enter Nominal Rated Output Power (Steady-state)","POUT(nom) = ",1000,"W",null,null,"This power level determines the PFC thermal design."]
[null,"è Enter Expected Efficiency for POUT(nom) at VIN(min)  ","ηVIN(min) = ",0.95,null,null,{"$f":"IF(η_VIN_min>0.98,\"Error:  Efficiency value must be < 0.98\",IF(η_VIN_min>0.96,\"Alert:  Verify that η > 0.96 is a reasonable expectation.\",IF(η_VIN_min<=0.91,\"Alert:  Verify that η < 0.91 is a reasonable expectation.\",\"\")))","v":""}]
[null,"  Calculated nominal input power at rated output","PIN(nom) = ",{"$f":"POUT_nom/η_VIN_min","v":1052.6315789473686},"W"]
[null,"  AC input current (RMS) (at rated power, minimum input voltage)","IIN_rms (nom) =",{"$f":"(PIN_nom/VIN_min)","v":12.383900928792571},"Arms"]
[null,"  AC input current (peak)  (at rated power, minimum input voltage)","IIN_peak (nom) =",{"$f":"1.4142*IIN_rms_nom","v":17.513312693498452},"Apk"]
[]
[null,"è Enter Additional Output as Percent of Nominal Power (Short-term)","PExtra% = ",10,"%",null,{"$f":"IF(PExtra<0,\"Error:  Pextra% < 0 is not allowed.\",IF(PExtra>30,\"Alert:  Verify that > 30% extra power capability is intentional.\",\"\"))","v":""},"Typically 10~20% extra for load-step transient recovery and design margin."]
[null,"  Calculated output power at extra level","POUT(extra) = ",{"$f":" POUT_nom*(1+PExtra/100)","v":1100},"W",null,null,"This power level determines the PFC current stresses."]
[null,"  Calculated input power at extra output level","PIN(extra) = ",{"$f":"POUT_extra/η_VIN_min","v":1157.8947368421054},"W"]
[null,"  AC input current (RMS)  (at extra power, minimum input voltage)","IIN_rms (extra) =",{"$f":"(PIN_extra/VIN_min)","v":13.622291021671829},"Arms"]
[null,"  AC input current (peak)  (at extra power, minimum input voltage)","IIN_peak (extra) =",{"$f":"1.4142*IIN_rms_extra","v":19.2646439628483},"Apk"]
[]
[null,"Step 3:  Enter Controller Part Number and IC Bias Voltage (VCC)"]
[]
[null,"è Enter Maximum Bias Voltage to VCC pin of UCC28070","VCC(max) = ",14,"V",null,{"$f":"IF(VCC_max>21, \"Error:  VCC of UCC28070 should be biased by a voltage source </= 21Vdc\", \"\")","v":""}]
[null,"è Enter Minimum Bias Voltage to VCC pin of UCC28070","VCC(min) = ",12,"V",null,{"$f":"IF(VCC_min<11, \"Error:  VCC of UCC28070 should be biased by a voltage source >/= 11Vdc\", \"\")","v":""}]
[null,null,null,null,null,null,{"$f":"IF((VCC_min>VCC_max),\"Error:  Voltages not in descending order, or incorrect entry\", IF(VCC_max>1.25*VCC_min,\"Alert:  >25% min-to-max variation; check for incorrect entry\", \"\"))","v":""}]
[]
[null,"PFC System-Level Calculations"]
[null,"Design Parameters","Variable Names","Value","Unit","Note","Notifications","Comments"]
[]
[null,"Step 1:  Program the Output Voltage "]
[]
[null,"è Enter the target maximum power dissipation of VSENSE Voltage Divider","PVSENSE (tgt) = ",50,"mW",null,null,"A typical target is ~50mW, for example. "]
[null,"  Calculated Upper Resistor of VSENSE Voltage Divider","RA (tgt) = ",{"$f":"(VOUT_nom_tgt^2)/PVSENSE_tgt/mW/_MΩ","v":3.0419999999999998},"MΩ"]
[null,"è Enter the actual Upper Resistor of VSENSE Voltage Divider","RA = ",3,"MΩ","use ±1%",null,"RA for VINAC divider should be the same value."]
[null,"  Calculated Lower Resistor of VSENSE Voltage Divider","RB (tgt) = ",{"$f":"(VREG*(RA*_MΩ))/(VOUT_nom_tgt-VREG) /kΩ","v":23.255813953488371},"kΩ"]
[null,"è Enter the actual Lower Resistor of VSENSE Voltage Divider","RB = ",23.2,"kΩ","use ±1%",null,"RB for VINAC divider should be the same value."]
[null,"  Calculated nominal output voltage based on selected RA and RB ","VOUT(nom) = ",{"$f":"(VREG)*(1+(RA*_MΩ)/(RB*kΩ))","v":390.93103448275866},"V",null,{"$f":"IF(OR(VOUT_nom<0.95*VOUT_nom_tgt,VOUT_nom>1.05*VOUT_nom_tgt),\"Alert: Vout(nom) deviates by more than +/-5% from Vout_nom target in cell D35.\",\"\")","v":""}]
[null,"  VSENSE and VINAC divider ratio (for reference)","KR =",{"$f":"RB*kΩ / (RA*_MΩ + RB*kΩ)","v":7.6739878274675842E-3}]
[null,"  VSENSE and VINAC filter capacitors CB4 and CB1 limitation ","CB1 , CB4 ≤",{"$f":"(100*us)/(RB*kΩ) * (47/fLINE_min)   / pF","v":4310.3448275862065},"pF",null,null,"Limitation based on 100µs max time constant at VINAC for 47Hz input.  Use lower values when possible."]
[]
[null,"  Calculated Nominal Over Voltage Trip Point","VOVP = ",{"$f":"1.06*VREG/KR","v":414.38689655172413},"V"]
[null,"  Calculated Actual VSENSE Divider Stand-by Power Dissipation","PVSENSE (max) =",{"$f":"(VOUT_nom^2) / (RA*_MΩ + RB*kΩ) /mW","v":50.55142687277052},"mW",null,null,"Use this loss value to select appropriate sizes of divider resistors."]
[null,"  Calculated Actual VINAC Divider Stand-by Power Dissipation","PVINAC (max) =",{"$f":"(VIN_max^2) / (RA*_MΩ + RB*kΩ) /mW","v":23.053717914792273},"mW",null,null,"Use this loss value to select appropriate sizes of divider resistors."]
[]
[null,"Step 2:  Program the Switching Frequency and Related Parameters"]
[]
[null,"è Select Specific Variant from Controller Family List","CTLR = ","UCC28070A",null,null,{"$f":"IF(OR(CTLR=\"UCC28070\",CTLR=\"UCC28070-Q1\",CTLR=\"UCC28070A\"),\"\", \"Error:  Controller must be selected from drop-down list.\")","v":""},{"$f":"IF(CTLR=\"UCC28070A\", \"Notice: switching frequency range is 300kHz to 10kHz.\",  \"Notice: switching frequency range is 300kHz to 30kHz.\")","v":"Notice: switching frequency range is 300kHz to 10kHz."}]
[null,"è Enter the target nominal switching frequency fSW ","fSW (tgt) = ",100,"kHz",null,{"$f":"IF(fSW_tgt>300,\"Error:  Switching frequency target must be </= 300kHz.\",IF(AND(CTLR=\"UCC28070A\",fSW_tgt<10),\"Error:  For UCC28070A, switching frequency target must be >/= 10kHz.\",IF(AND(OR(CTLR=\"UCC28070\",CTLR=\"UCC28070-Q1\"),fSW_tgt<30),\"Error:  For UCC28070 and UCC28070-Q1, switching frequency target must be >/=30kHz.\",\"\")))","v":""}]
[null,"è Enter if synchronizing fSW to external SYNC signal or not ","External SYNC =","No"]
[null,"  External SYNC frequency needed to achieve target fSW ","fSYNC (tgt) = ",{"$f":"IF(SYNC=\"Yes\", fSW_tgt*2,  \"N/A\"  )","v":"N/A"},"kHz"]
[null,"è Enter actual synchronization frequency (fSYNC) used ","fSYNC = ",null,"kHz",null,{"$f":"IF(AND(SYNC=\"Yes\",NOT(fSYNC=fSYNC_tgt)), \"Alert: Actual fSYNC entered is different than fSYNC target.\", \"\")","v":""}]
[null,"è Enter actual synchronization pulse width (tSYNC_PW) used ","tSYNC_PW = ",null,"µs",null,{"$f":"IF(SYNC=\"Yes\",IF(OR(tSYNC_PW<0.2,(tSYNC_PW*us)*(fSYNC*kHz)>0.5),\"Error: SYNC pulse width is outside of specified limits.\",\"\"), \"\")","v":""},"It is recommended to make tSYNC as close as possible to 0.2µs."]
[null,"  Actual SYNC pulse duty cycle ","DSYNC = ",{"$f":"IF(SYNC=\"Yes\", ((tSYNC_PW+0.1)*us)*(fSYNC*kHz),  \"N/A\" )","v":"N/A"},null,null,null,"DSYNC includes adjustment for 100ns propagation delay of tSYNC_PW falling edge."]
[null,"è Enter if \"on-chip\" Frequency Dithering is Enabled or Disabled ","Frequency Dithering =","Enabled",null,null,{"$f":"IF(NOT(OR(Dith=\"Enabled\",Dith=\"Disabled\")),\"Error: Entry must be selected from drop-down list only.\",\n  IF(AND(SYNC=\"Yes\",Dith=\"Enabled\"),\"Error: 'On-chip' Frequency Dithering must be Disabled when external SYNC is used.\",\"\"))","v":""}]
[null,"è Enter the target dithering magnitude fDM   (Note: max ΔfSW =  ± fDM/2). ","fDM (tgt) = ",10,"kHz",null,{"$f":"IF(fDM_tgt<9,\"Alert: fDM < 9kHz will have diminishing effect on conducted-EMI reduction.\",IF(fDM_tgt>20,\"Alert: fDM > 20kHz may introduce stability issues.\",\"\"))","v":""},"For no Dithering, set fDM (tgt) and fDR (tgt) each to \"0\""]
[null,"è Enter the target dithering rate fDR  ","fDR (tgt) = ",1,"kHz",null,{"$f":"IF(fDR_tgt<0.1,\"Alert: fDR < 0.1kHz will have diminishing effect on conducted-EMI reduction.\",IF(fDR_tgt>6,\"Alert: fDR > 6kHz may introduce stability issues.\",\"\"))","v":""},"For no Dithering, set fDM (tgt) and fDR (tgt) each to \"0\""]
[null,"Adjustment factor to Current-Loop gain when using external SYNC input","kSYNC = ",{"$f":"IF(SYNC=\"No\", 1,  (15000 / RRT)/fSYNC   )","v":1}]
[]
[null,"  Calculated Timing Resistor for targeted fSW ","RRT (tgt) = ",{"$f":"IF(SYNC=\"No\", (7500/fSW_tgt),   ((15000/(fSYNC-fDM_tgt/2))*1.1)  )","v":75},"kΩ",null,{"$f":"IF(SYNC=\"No\", \"\",  \"Notice: Recommended Rrt value is adjusted for SYNC input.\"  )","v":""}]
[null,"è Enter actual Timing Resistor Value","RRT = ",75,"kΩ","use ±1%",{"$f":"IF(RRT<0.98*RRT_tgt,\"Error: Rrt must be closer to Rrt target. \",\n  IF(AND(SYNC=\"Yes\",RRT>1.2*RRT_tgt),\"Error:  Abnormal switching behavior may occur unless Rrt value is set much closer to Rrt target.\",\n  IF(RRT>1.02*RRT_tgt,\"Error: Rrt must be closer to Rrt target.\",\"\")))","v":""}]
[null,"  Calculated actual switching frequency fSW, based on RRT or on fSYNC ","fSW = ",{"$f":"IF(SYNC=\"No\", (7500/RRT),   fSYNC/2)","v":100},"kHz",null,{"$f":"IF(SYNC=\"No\",  IF(OR(fSW<0.95*fSW_tgt,fSW>1.05*fSW_tgt),\"Alert: Actual switching frequency is more than  ±5% away from the target frequency.\",\"\"),\"\")","v":""}]
[null,"  Calculated actual switching period tSW, based on RRT or on fSYNC  ","tSW = ",{"$f":"1/(fSW*kHz)  /us","v":10.000000000000002},"µs"]
[]
[null,"è Enter the target maximum duty cycle DMAX ","DMAX (tgt) = ",0.97,null,null,{"$f":"IF(DMAX_tgt > 0.98, \"Error: Dmax target too close to 100%.  Reduce target.\", IF(DMAX_tgt < 0.85, \"Alert: Lower Dmax increases current distortion around the zero-crossings.\", \"\"))","v":""}]
[null,"  Calculated Duty Cycle Limit Resistor for targeted DMAX ","RDMX (tgt) = ",{"$f":"IF(SYNC=\"No\", RRT*(2*DMAX_tgt-1),    (15000/fSYNC)*(2*DMAX_tgt-1-DSYNC)   )","v":70.5},"kΩ",null,{"$f":"IF(SYNC=\"No\", \"\",  \"Notice: Recommended Rdmx value is adjusted for SYNC input.\"  )","v":""}]
[null,"è Select Duty Cycle Limit Resistor","RDMX = ",69.8,"kΩ","use ±1%",{"$f":"IF(DMAX>0.99,\"Error: Dmax too high.  Reduce value of Rdmx selected.\",\n  IF(DMAX>DMAX_tgt,\"Alert: Actual Dmax is > target value.\",\n  IF(DMAX<0.98*DMAX_tgt,\"Alert: Actual Dmax is < target value.\",\"\")))","v":""}]
[null,"  Calculated actual DMAX based on RDMX selection ","DMAX = ",{"$f":"IF(SYNC=\"No\", 0.5*(1+RDMX/RRT),   0.5*((RDMX*fSYNC/15000)+1+DSYNC)  )","v":0.96533333333333338}]
[]
[null,"  Program Dither Magnitude Resistor","RRDM (tgt) = ",{"$f":"IF(SYNC=\"Yes\",\"'SYNC'\",  IF(Dith=\"Disabled\",0,937.5/fDM_tgt))","v":93.75},"kΩ",null,{"$f":"IF(SYNC=\"Yes\", \"Notice: RDM pin is used for SYNC signal input.\",  IF(Dith=\"Disabled\", \"Notice: To disable Dithering, short RDM input to GND with 0 ohms.  \",   \"\"   ))","v":""}]
[null,"è Select a Standard Value","RRDM = ",93.1,"kΩ","use ±1%",{"$f":"IF(OR(RRDM<0.95*RRDM_tgt,RRDM>1.05*RRDM_tgt), \"Alert: Actual fDM will be more than +/- 5% from target value.\",   \"\")","v":""}]
[null,"  Program Dither Rate Capacitor","CCDR (tgt) = ",{"$f":"IF(Dith=\"Disabled\", \"'VREF'\",   66.7*(RRDM/fDR_tgt) )","v":6209.7699999999995},"pF",null,{"$f":"IF(Dith=\"Disabled\", \"Notice: To disable Dithering, set CDR input > 5V.  It is suggested to short CDR to VREF.\",   \"\"   )","v":""}]
[null,"è Select a Standard Value","CCDR = ",5600,"pF","use ±5%",{"$f":"IF(OR(CCDR<0.9*CCDR_tgt,CCDR>1.1*CCDR_tgt), \"Alert: Actual fDR will be more than +/- 10% from target value.\",   \"\")","v":""}]
[null,"  Calculated actual Dither Magnitude based on RRDM selection ","fDM = ",{"$f":"937.5/RRDM","v":10.069817400644469},"kHz"]
[null,"  Calculated actual Dither Rate based on CCDR selection ","fDR = ",{"$f":"66.7*(RRDM/CCDR)","v":1.1088874999999998},"kHz"]
[]
[null,"  Calculated maximum switching frequency ","fSW(nom) + fDM/2 = ",{"$f":"IF(SYNC=\"No\", fSW + fDM/2,   fSYNC + fDM_tgt/2   )","v":105.03490870032223},"kHz"]
[null,"  Calculated minimum switching frequency ","fSW(nom) - fDM/2 = ",{"$f":"IF(SYNC=\"No\", fSW - fDM/2,   fSYNC - fDM_tgt/2   )","v":94.965091299677766},"kHz"]
[null,"  Approximate number of switching cycles between min and max fSW ","NΔfSW = ",{"$f":"IF(SYNC=\"No\", fSW/fDR/2,   fSYNC/fDR_tgt/2  )","v":45.090236836468989}]
[]
[null,"Step 3:  Calculations for Boost Inductors"]
[]
[null,"è Enter the Highest RMS input voltage at which CCM operation is to be maintained","Vrms_CCM(max) = ",230,{"$f":"IF(VIN_type=\"AC\",\"Vrms\",IF(VIN_type=\"DC\",\"Vdc\",\"Error\"))","v":"Vrms"},null,{"$f":"IF(OR(Vrms_CCM_max<VIN_min,Vrms_CCM_max>VIN_max), \"Error: Vrms_CCM(max) target must be within VIN_max and VIN_min.\", \"\")","v":""},"CCM = Continuous Conduction Mode of inductor current"]
[null,"è Enter the Lowest total output power level where CCM is to be maintained","PO_CCM(min) = ",333,"W",null,{"$f":"IF(PO_CCM_min>POUT_nom, \"Error: Po_CCM(min) target must be less than Pout(nom).\",  IF(PO_CCM_min<POUT_nom/3, \"Alert: Lower targets for Po_CCM(min) require increasingly higher inductances.\",  \"\"))","v":"Alert: Lower targets for Po_CCM(min) require increasingly higher inductances."}]
[null,"  Calculated lowest power level per inductor where CCM is to be maintained","PLx_CCM(min) = ",{"$f":"PO_CCM_min/2","v":166.5},"W"]
[null,"è Enter the Expected conversion efficiency at PO_CCM(min) and Vrms_CCM(max)","ηPo_ccm(min) = ",0.92]
[null,"  Calculated target boost Inductance at PO_CCM(min) and Vrms_CCM(max)","Lx_CCM (tgt) = ",{"$f":"Vrms_CCM_max^2 / (2 * (PLx_CCM_min/η_Po_ccm_min) *fSW*kHz) /uH","v":1461.5015015015017},"µH"]
[null,"è Enter the value of the Actual Boost Inductance at PO_CCM(min) and Vrms_CCM(max)","L1_CCM, L2_CCM = ",1500,"µH",null,{"$f":"IF(Lx_CCM<L_CCM_tgt, \"Alert: Inductor current in some portions of the AC half-sine will operate in DCM.\",  IF(Lx_CCM>1.2*L_CCM_tgt, \"Alert: Excess Inductance at CCM target may unnecessarily increase size and cost of inductor. \",  \"\" ))","v":""}]
[null,"è Enter the Lowest Inductance of the Real Inductor at 100% load, lowest-line","L1_MIN, L2_MIN = ",1000,"µH",null,{"$f":"IF(L_MIN>Lx_CCM, \"Error: Lx_min value must be </=  Lx_ccm target.\",   \"\")","v":""}]
[null,"è Enter the Highest Inductance of the Real Inductor at 0% load","L1_MAX, L2_MAX = ",1600,"µH",null,{"$f":"IF(L_MAX<Lx_CCM, \"Error: Lx_max value must be >/= Lx_ccm target.\",    \"\")","v":""}]
[null,"  Average Boost Inductance Value","L1_AVG, L2_AVG = ",{"$f":"(L_MIN + L_MAX)/2","v":1300},"µH"]
[]
[null,"  Maximum peak-to-peak ripple current in inductor at rated output power ","∆ILx = ",{"$f":"IF( DPLL>0.5, (1.4142*VIN_min/(L_MIN*uH))*DPLL/(fSW*kHz), (1.4142*VIN_min/(L_MIN*uH))*0.5/(fSW*kHz) )","v":0.83244667582164589},"Apkpk",null,{"$f":"IF(_∆ILx/2>=((POUT_nom/η_VIN_min/VIN_max)*1.4142/2), \"Alert: Low Lx_min value allows ripple current to exceed CCM limits.\",    \"\")","v":""},"Use this value to determine core loss for Lboost."]
[null,"  Maximum peak current in inductor at rated output power ","ILx_peak = ",{"$f":" (0.5*IIN_peak_nom) + (0.5*(1.4142*VIN_min/(L_MIN*uH))*DPLL/(fSW*kHz))","v":9.1728796846600495},"Apk"]
[null,"  Maximum RMS current in inductor at rated output power ","ILx_RMS ≤ ",{"$f":"SQRT( (0.5*IIN_rms_nom)^2 + (_∆ILx/SQRT(12))^2 )","v":6.1966118034410211},"Arms",null,null,"Use this value to determine conduction loss for Lboost."]
[]
[null,"  Maximum peak-to-peak ripple current in inductor at extra output power ","∆ILx_xtr = ",{"$f":"IF( DPLL>0.5, (1.4142*VIN_min/(L_MIN*uH))*DPLL/(fSW*kHz), (1.4142*VIN_min/(L_MIN*uH))*0.5/(fSW*kHz) )","v":0.83244667582164589},"Apkpk"]
[null,"  Maximum peak current in inductor at extra output power ","ILx_peak_xtr = ",{"$f":" (0.5*D49) + (0.5*(1.4142*VIN_min/(L_MIN*uH))*DPLL/(fSW*kHz))","v":10.048545319334973},"Apk",null,null,"Use this value to determine Bsat margin for Lboost."]
[null,"  Maximum RMS current in inductor at extra output power","ILx_RMS_xtr ≤ ",{"$f":"SQRT( (0.5*IIN_rms_extra )^2 + (D126/SQRT(12))^2 )","v":6.8153833684384511},"Arms",null,null,"Use this value to determine conduction loss for Lboost, if extra power lasts longer than thermal time constant"]
[]
[null,"  Duty Cycle at the Peak of Low Line Input","DPLL = ",{"$f":"1 - ((1.4142*VIN_min)/VOUT_nom)","v":0.6925109817412014}]
[]
[null,"Step 4:  Calculations for Output Capacitance"]
[]
[null,"  Minimum output Voltage at end of hold-up time (repeated from cell D37)","VOUT_hup (tgt) = ",{"$f":"VOUT_min_tgt","v":300},"V"]
[null,"è Enter the target Hold-up time (in seconds)","thup (tgt) = ",1.0999999999999999E-2,"s"]
[null,"è Enter which output power level to use for COUT (tgt1) calculation","Phup_lvl = ","EXTRA",null,null,"Note: Select \"EXTRA\" if extra output power can be active during a significant portion of the hold-up time."]
[null,"  Output Capacitance Calculated Based on Holdup time and Vout_min target","COUT (tgt1) = ",{"$f":"IF(Phup_lvl=\"RATED\",  2*POUT_nom*thup_tgt / ((VOUT_nom^2)-(VOUT_hup_tgt)^2) /uF, IF(Phup_lvl=\"EXTRA\", 2*POUT_nom*(1+PExtra/100)*thup_tgt / ((VOUT_nom^2)-(VOUT_hup_tgt)^2) /uF,\"Error\"))","v":385.18426159992316},"µF"]
[null,"  Output Capacitance Calculated Based on Vripple target","COUT (tgt2) = ",{"$f":"2*(PIN_nom/VOUT_nom)/(2*PI()*2*fLINE_min*Vripple_tgt)  / uF","v":828.90705213512558},"µF"]
[null,"è Enter Minimum Capacitance necessary to sustain rated HF and LF IRMS ","COUT (tgt3) = ",470,"µF",null,null,"This entry requires a catalog search for one or more capacitors to meet the RMS requirements."]
[null,"  Maximum value of the three previous COUT targets","COUT (tgt) = ",{"$f":"MAX( COUT_tgt1, COUT_tgt2, COUT_tgt3 )","v":828.90705213512558},"µF"]
[null,"è Enter the actual Output Capacitance ","COUT = ",990,"µF",null,{"$f":"IF(COUT<COUT_tgt,\"Alert: Selected Cout is too low to meet all requirements.\",\"\")","v":""},"Selected value should include considerations of tolerance and aging."]
[null,"  Actual Output Ripple Voltage  (peak-to-peak)","VRIPPLE = ",{"$f":"2*(PIN_nom/VOUT_nom)/(2*PI()*2*fLINE_min*COUT*uF)","v":9.2100783570569504},"Vpkpk"]
[null,"  Total Interleaved RMS Current in COUT ","ICOUT_TOT = ",{"$f":"IF(DPLL>0.5, (PIN_nom/VOUT_nom)*SQRT( (16/(6*PI()))*(VOUT_nom/(VIN_min*1.4142)) - 1*η_VIN_min^2 ), (1.25*ICOUT_LF))","v":3.6702885914988079},"Arms"]
[null,"  Low Frequency RMS Current in COUT ","ICOUT_LF = ",{"$f":"((VRIPPLE/2)/1.4142) * (2*PI()*2*fLINE_min*COUT*uF)","v":1.9039932879955899},"Arms"]
[null,"  High Frequency RMS Current in COUT ","ICOUT_HF = ",{"$f":"SQRT(ICOUT_TOT^2 - ICOUT_LF^2)","v":3.1378062247618232},"Arms"]
[null,"  Actual hold-up time to Vout_min at Pout_nom load level","thup = ",{"$f":"COUT*uF / (2*POUT_nom / ((VOUT_nom^2)-(VOUT_min_tgt)^2))","v":3.1099401492271118E-2},"s"]
[null,"  Actual hold-up time to Vout_min at Pout_extra load level","thup_extra = ",{"$f":"COUT*uF / (2*POUT_extra / ((VOUT_nom^2)-(VOUT_min_tgt)^2))","v":2.8272183174791927E-2},"s"]
[]
[null,"Step 5:  Calculations for Switching MOSFETs and Output Diodes"]
[]
[null,"  Peak Diode and MOSFET Current  (at rated power condition)","IPEAK_rated = ",{"$f":"ILx_peak","v":9.1728796846600495},"Apk"]
[null,"  Maximum RMS Current in each MOSFET (Q1, Q2)  (at rated power)","IDS_rated = ",{"$f":"(IIN_rms_nom/2)  *  ( 1 - (8/(3*PI())*(VIN_min*1.4142)/VOUT_nom) )^0.5","v":5.3228997452447144},"Arms",null,null,"Use for conduction loss calculations at rated POUT."]
[null,"  Maximum Average Current in each output diode (D1, D2)  (at rated power)","ID_rated = ",{"$f":"0.5*(POUT_nom/VOUT_nom)","v":1.2789979712445971},"A",null,null,"Use for conduction loss calculations at rated POUT."]
[]
[null,"  Peak Diode and MOSFET Current  (at extra power condition)","IPEAK_extra = ",{"$f":"ILx_peak_xtr","v":10.048545319334973},"Apk"]
[null,"  Maximum RMS Current in each MOSFET (Q1, Q2)  (at extra power)","IDS_extra = ",{"$f":"(IIN_rms_extra/2)  *  ( 1 - (8/(3*PI())*(VIN_min*1.4142)/VOUT_nom) )^0.5","v":5.8551897197691867},"Arms",null,null,"Use for conduction loss calculations at extra POUT."]
[null,"  Maximum Average Current in each output diode (D1, D2)  (at extra power)","ID_extra = ",{"$f":"0.5*(POUT_extra/VOUT_nom)","v":1.4068977683690569},"A",null,null,"Use for conduction loss calculations at extra POUT."]
[]
[null,"Step 6:  Calculations for Current-Sense Transformer (CT) Parameters"]
[]
[null,"  Calculated CT turns-ratio to target 0.1A at ILx_peak_xtr ","NCT (tgt) = ",{"$f":"ILx_peak_xtr/0.1","v":100.48545319334973}]
[null,"è Enter CT Turns Ratio actually used","NCT = ",100]
[null,"  Minimum Magnetizing Inductance target for the CT","LM_CT(min) (tgt) =  ",{"$f":"(3.7/(0.02*IPEAK_extra/NCT)) * (1 - VIN_min*1.4142/VOUT_nom)*(tSW*us) /mH","v":12.749560015976627},"mH"]
[null,"è Enter actual CT magnetizing inductance","LM_CT = ",15,"mH",null,{"$f":"IF(LM_CT<0.95*Lm_CT_tgt, \"Alert: Low magnetizing inductance of CT results in > 2% current-sense error.\",   \"\")","v":""}]
[]
[null,"  Calculated Current-Sense Resistor","RSx (tgt) = ",{"$f":"(VPKLMT-VOFF-Vramp)/(IPEAK_extra/NCT)","v":33.823641409372662},"Ω"]
[null,"è Select Standard Current-Sense Resistor","RSA = RSB = ",33.200000000000003,"Ω","use ±1%",{"$f":"IF(RSx>1.02*RSx_tgt, \"Alert: Rsx value higher than target may not provide full output power in worst-case conditions.\", IF(RSx<0.95*RSx_tgt, \"Alert: Rsx significantly lower than target may allow excess output power.\",   \"\"))","v":""}]
[null,"  Calculated worst-case RSx power loss (each), based on IDS_extra ","PRS (max) ≤ ",{"$f":"(IDS_extra/NCT)^2*RSx /mW","v":113.82037889290936},"mW",null,"Use this loss value to select appropriate size of curent-sense resistor."]
[]
[null,"  Calculated CT current at 10% of ½IIN_peak_extra/NCT ","IF_CT_10% =",{"$f":"0.1 * (0.5*IIN_peak_extra/NCT) /mA","v":9.6323219814241501},"mA",null,"Establish a low value of current near the AC-line zero-crossing."]
[null,"è Enter forward drop of CT output diode DRx at IF_CT_10% ","VF_CT =",0.61,"V",null,null,"Get VF from forward V-I characteristics curve in diode datasheet."]
[null,"  Calculated Zener target voltage with +33% margin (if Zener diode is used)","VZ (tgt) ≥ ",{"$f":"0*(VPKLMT+1)*DMAX/(1-DMAX)  +  1.33 * ((IF_CT_10*mA)*RSx + VF_CT + VOFF + 0.5*Vramp)*DMAX / (1-DMAX)","v":37.162694619146265},"V",null,null,"Lower Dmax will reduce the required reset voltage."]
[]
[null,"è Enter a Zener diode value ≥ VZ (tgt) ","VZ =",47,"V",null,{"$f":"IF(VZ<0.9*VZ__tgt, \"Alert: Vz voltage significantly lower than Vz target may not reset the CT properly.\",   \"\")","v":""}]
[null,"  Calculated CT Reset peak voltage (if Zener diode reset is used)","VR_Z = ",{"$f":"VZ + 1","v":48},"V",null,"Reverse voltage stress applied to CT output diode DRx, if Zener reset is used."]
[]
[null,"  Calculated minimum Reset Resistance (if resistor reset is used)","RR (tgt) ≥ ",{"$f":"(LM_CT*mH) / ((tSW*us)*(1-DMAX)/3)  /kΩ","v":129.80769230769243},"kΩ",null,"Based on 3 L/R time constants","Lower Dmax will reduce this.  "]
[null,"è Select a Standard Value","RR = ",130,"kΩ",null,{"$f":"IF(RR<0.9*RR_tgt, \"Alert: Rr value significantly lower than Rr target may not reset the CT properly.\",   \"\")","v":""}]
[null,"  Calculated CT Reset peak voltage (if resistor reset is used)","VR_R = ",{"$f":"(RR*kΩ)*(IM_CT_max*mA)","v":407.33333333333343},"V",null,"Reverse voltage stress applied to CT output diode DRx, if Resistor reset is used.","Lower Dmax will reduce this.  Winding capacitance may prohibit this peak voltage."]
[]
[null,"  Estimated worst-case CT magnetizing current IM_CT ","IM_CT(max) ≤ ",{"$f":"((3.7+1)/(LM_CT*mH))*(tSW*us)  /mA","v":3.1333333333333337},"mA"]
[null,"  Calculated worst-case CT reset power loss, based on IM_CT ","PM_CT(max) ≤ ",{"$f":"0.5*(LM_CT*mH)*(IM_CT_max*mA)^2 * (fSW*kHz)  /mW","v":7.363333333333336},"mW",null,"Use this loss value to select appropriate size of reset Zener or Resistor"]
[]
[null,"Step 7:  Calculations for Current-Sense Offset and Ramp Voltages"]
[]
[null,"è Enter Current-Sense Offset Voltage Target   (Enter 0 if not used)","VOFF (tgt) = ",0.05,"V",null,null,"Suggest 0.1V to start. Adjust target empirically for minimum THDi during prototype evaluation."]
[null,"  Program Offset Bias Current to be added to RS","ROx (tgt) = ",{"$f":"IF(VOFF_tgt>0, ( ((VCC_min-VOFF_tgt)*RSx)/VOFF_tgt ) / kΩ,   \"OPEN\" )","v":7.9348000000000001},"kΩ"]
[null,"è Enter a Standard Value","ROA=ROB = ",8.1999999999999993,"kΩ",null,{"$f":"IF(VOFF_tgt=0, \"Notice: If offset is not used, leave Rox open.\", IF(OR(ROx<0.95*ROx_tgt,ROx>1.05*ROx_tgt), \"Alert: Select Rox value closer to Rox target.\",   \"\"))","v":""}]
[null,"  Calculated actual offset voltage on CSA and CSB inputs (at VCC_min)","VOFF = ",{"$f":"IF(VOFF_tgt=0, 0,  (VCC_min/(ROx*kΩ))*RSx  )","v":4.8585365853658538E-2},"V",null,null,"Offset voltage will vary slightly with VCC variations."]
[]
[null,"è Enter Current-Sense Ramp Peak Voltage Target    (Enter 0 if not used)","VOFF + ΔVRAMP (tgt) = ",0.1,"Vpk",null,null,"Suggest 0.3V to start. Adjust target empirically for minimum THDi during prototype evaluation."]
[null,null,"ΔVRAMP (tgt) = ",{"$f":"Vramp_tgt-VOFF","v":5.1414634146341467E-2},"V",null,{"$f":"IF(ΔVRAMP_tgt<0, \"Alert:  Voff + Vramp peak target must be higher than Voff.\", \"\")","v":""}]
[null,"  Program current-sense PWM Ramp Resistor","RTx (tgt) = ",{"$f":"IF(ΔVRAMP_tgt>0, RSx*( (MIN(VCC_min-1.5, 13)-0.6)/ΔVRAMP_tgt - 1 ) /kΩ,   \"OPEN\" )","v":6.3595324478178359},"kΩ"]
[null,"è Select Standard Values","RTA=RTB = ",6.2,"kΩ",null,{"$f":"IF(ΔVRAMP_tgt<=0, \"Notice: If ramp is not used, leave Rtx open.\",  IF(OR(RTx<0.95*RTx_tgt,RTx>1.05*RTx_tgt), \"Alert: Select Rtx value closer to Rtx target.\",   \"\"))","v":""}]
[null,"  Program current-sense PWM Ramp Timing Capacitor","CTx (tgt) = ",{"$f":"IF(ΔVRAMP_tgt>0, 1/(RSx*fSW*kHz*3) /uF,   \"OPEN\" )","v":0.1004016064257028},"µF"]
[null,"è Select Standard Values","CTA=CTB = ",0.1,"µF",null,{"$f":"IF(ΔVRAMP_tgt<=0, \"Notice: If ramp is not used, leave Ctx open.\", IF(OR(CTx<0.8*CTx_tgt,CTx>1.2*CTx_tgt), \"Alert: Select Ctx value closer to Ctx target.\",   \"\"))","v":""}]
[null,"  Calculated actual Ramp delta Voltage on CSA and CSB inputs at DMAX ","ΔVRAMP = ",{"$f":"IF(ΔVRAMP_tgt=0, 0,   (MIN(VCC_min-1.5,13)-0.6)/(RTx*kΩ) * RSx * (1-EXP(-((tSW*us)*DMAX)/(RSx*(CTx*uF))))  )","v":5.0118135662108404E-2},"V",null,null,"Note: Ramp peak voltage is lower for D < Dmax."]
[null,"  Calculated actual Ramp peak Voltage on CSA and CSB inputs at DMAX ","VOFF + ΔVRAMP = ",{"$f":"VOFF+Vramp","v":9.8703501515766942E-2},"Vpk"]
[]
[null,"Step 8:  Calculations for Peak Current Limit (PKLMT) Setting"]
[]
[null,"  Calculated maximum peak CS voltage at extra power level","VCS_PK = ",{"$f":"(ILx_peak_xtr/NCT)*RSx + (VOFF + Vramp)","v":3.4348205475349785},"V"]
[null,"è Select current-sense Peak Limit Voltage ","VPKLMT (tgt) = ",3.5,"V",null,{"$f":"IF(VPKLMT_tgt<0.99*VCS_PK, \"Alert: Lower PKLMT voltage target may limit maximum output power.\", \"\")","v":""}]
[null,"PKLMT divider load on VREF   (suggest 0.1mA ≤ IPKLMT ≤ 0.5mA)","IR_PKLMT (tgt) = ",0.1,"mA",null,{"$f":"IF(IR_PKLMT_tgt>2, \"Error: VREF loading should not exceed 2mA to avoid overload.\", \"\")","v":""}]
[null,"  Calculated High-Side Resistor on Peak Current Limit Divider","RPK1 (tgt) = ",{"$f":"(VREF-VPKLMT_tgt)/(IR_PKLMT_tgt*mA) /kΩ","v":25},"kΩ"]
[null,"è Select High-Side Resistor on Peak Current Limit Divider","RPK1 = ",24.9,"kΩ","use ±1%"]
[null,"  Calculated Low-Side Resistor on Peak Current Limit Divider","RPK2 (tgt) = ",{"$f":"(VPKLMT_tgt*RPK1_)/(VREF-VPKLMT_tgt)","v":34.86},"kΩ"]
[null,"è Select Low-Side Resistor on Peak Current Limit Divider","RPK2 = ",34.799999999999997,"kΩ","use ±1%"]
[null,"  Calculated actual PKLMT Voltage ","VPKLMT = ",{"$f":"VREF*(RPK2_/(RPK1_+RPK2_))","v":3.4974874371859297},"V",null,{"$f":"IF(OR(VPKLMT<0.98*VPKLMT_tgt, VPKLMT>1.02*VPKLMT_tgt), \"Error: Vpklmt deviates from Vpklmt target by more than 2%.\", \"\")","v":""}]
[null,"  Calculated peak inductor current at PKLMT ","IL_PKLMT = ",{"$f":"(VPKLMT/RSx)*NCT","v":10.534600714415451},"A",null,null,"Result does not include peak increase due to MOSFET turn-off delays."]
[]
[null,"  Calculated PKLMT divider current loading on VREF ","IR_PKLMT = ",{"$f":"VREF/(RPK1_+RPK2_)  /kΩ /mA","v":0.10050251256281408},"mA",null,{"$f":"IF(OR(IR_PKLMT<0.95*IR_PKLMT_tgt, IR_PKLMT>1.05*IR_PKLMT_tgt), \"Alert: Selected Rpk1 and Rpk2 values allow Ir_pklmt current to deviate from target by more than 5%.\", \"\")","v":""}]
[null,"  Remaining VREF current available for other use.","IVREF_avail = ",{"$f":"2-IR_PKLMT","v":1.8994974874371859},"mA",null,{"$f":"IF(D213<0, \"Error: Increase Rpk1 and Rpk2 values to draw < 2mA from VREF.\", \"\")","v":""}]
[null,null,null,null,null,null,null,null,null,"Voltage-Loop Graph Axes Can be Adjusted Based on Individual Need"]
[null,"Step 9:  Calculations for Voltage-Loop Compensation Components    (See graph at right ===>  )"]
[]
[null,"  Voltage-Sense Divider Gain","HV = ",{"$f":"KR","v":7.6739878274675842E-3}]
[null,"  Voltage Amplifier Output Impedance at double fLINE","ZO = ",{"$f":"(3.2*0.02)/(VRIPPLE*Hv*gMV) /kΩ","v":12.935925415685439},"kΩ"]
[null,"  Calculated Pole Capacitance for the Voltage-Loop","CPV (tgt) = ",{"$f":"1/(2*PI()*2*fLINE_min*ZO*kΩ) /uF","v":0.13088647607800521},"µF"]
[null,"è Select a Standard Value","CPV = ",0.15,"µF",null,"Check the Voltage-Loop Frequency Response graph to the right (è) for effects of CPV on gain and phase."]
[null,"  Calculated Voltage-Loop Crossover Frequency","fCV = ",{"$f":"(Hv*gMV*(POUT_nom/(η_VIN_min*3.2))*(1/(VOUT_nom*2*PI()*COUT*uF))*(1/(2*PI()*CPV*uF)))^0.5","v":8.7807095484941833},"Hz"]
[null,"  Calculated Voltage-Loop Zero Compensation Resistor","RZV (tgt) = ",{"$f":"1/(2*PI()*fCV*CPV*uF)  /kΩ","v":120.83681257033803},"kΩ"]
[null,"è Select a Standard Value","RZV = ",120,"kΩ",null,"Check the Voltage-Loop Frequency Response graph to the right (è) for effects of RZV on gain and phase."]
[null,"  Calculated Voltage-Loop Zero Compensation Capacitor","CZV (tgt) = ",{"$f":"1/(2*PI()*(fCV/10)*(RZV*kΩ))  /uF","v":1.5104601571292253},"µF"]
[null,"è Select a Standard Value","CZV = ",1.5,"µF",null,"Check the Voltage-Loop Frequency Response graph to the right (è) for effects of CZV on gain and phase."]
[]
[null,"Step 10:  Calculations for RSYNTH and IMO Resistors"]
[]
[null,"  Calculated Current Synthesis Programming Resistor","RSYN (tgt) = ",{"$f":" 10*NCT*L_AVG*KR / RSx","v":300.48747517192345},"kΩ"]
[null,"è Select a Standard Value","RSYN = ",300,"kΩ","use ±1%",{"$f":"IF(OR(RSYN<0.95*RSYN_tgt,RSYN>1.05*RSYN_tgt), \"Alert: Excessive deviation from recommended value can significantly under-state or over-state the current measurement, especially at narrow duty-cycles.\", \"\")","v":""}]
[]
[null,"  Quantized Voltage-Feed-Forward gain factor at VIN(min) for IIMO","kVFF = ",{"$f":"IF( (VIN_min*1.4142*KR) < 0.95*1, 0.398,\n  IF( (VIN_min*1.4142*KR) < 0.95*1.2, 0.6,\n  IF( (VIN_min*1.4142*KR) < 0.95*1.4, 0.839,\n  IF( (VIN_min*1.4142*KR) < 0.95*1.65, 1.156,\n  IF( (VIN_min*1.4142*KR) < 0.95*1.95, 1.604,\n  IF( (VIN_min*1.4142*KR) < 0.95*2.25, 2.199,\n  IF( (VIN_min*1.4142*KR) < 0.95*2.6, 2.922,  3.857 )))))))","v":0.39800000000000002}]
[null,"  Maximum CSx Voltage at IIN_peak_extra at VIN(min)  ","VCSx (max) = ",{"$f":"(0.5*IIN_peak_extra/NCT)*RSx","v":3.1979308978328178},"V"]
[null,"  Maximum output current of Multiplier ","IIMO (max) = ",{"$f":"(17*uA)*(VIN_min*1.4142*KR)*(5-1)/kVFF  /uA","v":157.60743649445959},"µA"]
[null,"  Multiplier Resistor","RIMO (tgt) = ",{"$f":"VCSx_max/(IIMO_max*uA) /kΩ","v":20.290482282828293},"kΩ"]
[null,"è Select a Standard Value","RIMO = ",20.5,"kΩ","use ±1%",{"$f":"IF(RIMO<0.98*RIMO_tgt, \"Alert: Rimo value lower than target may not provide full output power in worst-case conditions.\", IF(RIMO>1.05*RIMO_tgt, \"Alert: Rimo significantly higher than target may allow excess output power.\",   \"\"))","v":""}]
[]
[null,"Step 11:  Calculations for Current-Loop Compensation Components    (See graph at right ===>  )",null,null,null,null,null,null,null,"Current-Loop Graph Axes Can be Adjusted Based on Individual Need"]
[]
[null,"  Current-Loop Power Stage Gain at Loop Crossover (set at fSW/10) ","GPSC = ",{"$f":"(VOUT_nom*RSx/NCT)/(4*kSYNC*2*PI()*(fSW*kHz/10)*(L_AVG*uH))","v":0.39724187256266286}," "]
[null,"  Current-Loop Zero Resistor","RZCx (tgt) = ",{"$f":"1/(gMC*GPSC)  /kΩ","v":25.173579853222929},"kΩ"]
[null,"è Select a Standard Value","RZC1=RZC2 = ",25,"kΩ",null,"Check the Current-Loop Frequency Response graph to the right (è) for effects of RZC on gain and phase."]
[null,"  Current-Loop Zero Capacitor  (set zero at fSW/10) ","CZCx (tgt) = ",{"$f":"1/(2*PI()*(fSW*kHz/10)*(RZCx*kΩ))  /pF","v":636.61977236758139},"pF"]
[null,"è Select a Standard Value","CZC1=CZC2 = ",820,"pF",null,"Check the Current-Loop Frequency Response graph to the right (è) for effects of CZC on gain and phase."]
[null,"  Current-Loop Pole Capacitor  (set pole at fSW/2) ","CPCx (tgt) = ",{"$f":"1/(2*PI()*(fSW*kHz/2)*(RZCx*kΩ))  /pF","v":127.32395447351628},"pF"]
[null,"è Select a Standard Value","CPC1=CPC2 = ",120,"pF",null,"Check the Current-Loop Frequency Response graph to the right (è) for effects of CPC on gain and phase."]
[]
[null,"Step 12:  Calculations for Soft-Start Capacitor"]
[]
[null,"è Enter the target Soft-Start time (in seconds)","tSS (tgt) = ",0.5,"s"]
[null,"  Calculated CSS value to achieve tSS (tgt)","CSS (tgt1) = ",{"$f":"Iss*tSS_tgt/(VREG-0.75) /uF","v":2.2222222222222228},"µF"]
[null,"  CZV value (from cell D225, repeated here for reference)","CSS (tgt2) = CZV = ",{"$f":"CZV","v":1.5},"µF"]
[null,"  Calculated Soft-Start Capacitor (maximum of CSS (tgt1) and CSS (tgt2))","CSS (tgt) ≥ ",{"$f":"MAX( D251, D252 )","v":2.2222222222222228},"µF"]
[null,"è Select a Standard Value (Be sure CSS ≥ CZV)","CSS = ",2.2000000000000002,"µF",null,{"$f":"IF(Css<D252,\"Error: Selected Css value is too low.  Czv may affect soft-start.\", IF(Css<0.9*CSS_tgt,\"Alert: Css value is lower than target and may not provide adequate soft-start.\",\"\"))","v":""}]
[null,"  Estimated time to PFC output regulation, low-line input","tSS_LL = ",{"$f":"(Css*uF)*(VREG-(1.4142*VIN_min*KR))/Iss","v":0.45705724794919289},"s"]
[null,"  Estimated time to PFC output regulation, high-line input","tSS_HL = ",{"$f":"(Css*uF)*(VREG-(1.4142*VIN_max*KR))/Iss","v":2.9683687748081476E-2},"s"]
[]
[]
[]
[]
[null,null,null,null," "]

{"sheet":"Voltage-Loop Calculations","index":1,"n_rows":101,"n_cols":15,"rows_kept":101,"cut":false,"hidden":true,"merged":[]}
["f  (Hz) ","ω=2πf  (rad)"," Gcv_numerator","Gcv_denominator","Gcv","GcvdB","Comp_Phase","Gps","GpsdB","Phase PS","Gain","Phase","Frequency","MathCAD Loop","MathCAD Loop Phase "]
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[{"$f":"1+A2","v":2},{"$f":"2*PI()*A3","v":12.566370614359172},"5.37179147922731E-07+1.21507060663849E-06i","-4.26366910127059E-06+0.0000207345115136926i","0.0511126992662793-0.0364178719121618i",-24.046394424362731,{"$f":"180/PI()*IMARGUMENT(E3)","v":-35.469926953439852},{"$f":"IMDIV((POUT_nom/(η_VIN_min*3.3*VOUT_nom)),COMPLEX(0,B3*COUT*uF))","v":"-65.5869216335873i"},36.336344949517944,-90,12.289950525155213,54.530073046560148]
[{"$f":"1+A3","v":3},18.849555921538759,"5.37179147922731E-07+1.82260590995773E-06i","-9.59325547785885E-06+0.0000311017672705389i","0.0486458156233733-0.0322763293929431i",-24.674778820553751,-33.564135466394049,"-43.7246144223915i",32.81451976840431,-90,8.1397409478505587,56.435864533605951]
[4,25.132741228718345,"5.37179147922731E-07+2.43014121327697E-06i","-0.0000170546764050824+0.0000414690230273853i","0.0455669027846588-0.0316937278418397i",-25.113315585709977,-34.820263124048743,"-32.7934608167936i",30.315745036238305,-90,5.2024294505283279,55.179736875951249]
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[7,43.982297150257104,"5.37179147922731E-07+4.25274712323471E-06i","-0.0000522299464905648+0.0000725707902979242i","0.0350952330657468-0.0326605412906518i",-26.385769678981998,-42.942056290854865,"-18.7391204667393i",25.454984062512466,-90,-0.93078561646953162,47.05794370914515]
[8,50.26548245743669,"5.37179147922731E-07+4.86028242655395E-06i","-0.0000682187056203296+0.0000829380460547705i","0.0317759638539451-0.0326134313568346i",-26.833278431644722,-45.745163824439508,"-16.3967304083969i",24.295145122958736,-90,-2.5381333086859854,44.254836175560484]
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[10,62.831853071795862,"5.37179147922731E-07+6.07535303319246E-06i","-0.000106591727531765+0.000103672557568463i","0.0258975046545651-0.0318082141036895i",-27.740595806149567,-50.848324152813646,"-13.1173843267175i",22.356944862797597,-90,-5.3836509433519701,39.151675847186368]
[11,69.115038378975441,"5.37179147922731E-07+6.68288833651169E-06i","-0.000128975990313436+0.000114039813325309i","0.0233749936424863-0.0311469477015039i",-28.19151090628425,-53.112702451358395,"-11.9248948424704i",21.529091159633055,-90,-6.6624197466511959,36.887297548641612]
[12,75.398223686155035,"5.37179147922731E-07+7.29042363983092E-06i","-0.000153492087645743+0.000124407069082156i","0.0211217245155734-0.0303776687802254i",-28.636187566406619,-55.18894371616436,"-10.9311536055979i",20.773319941845084,-90,-7.8628676245615345,34.811056283835626]
[13,81.681408993334628,"5.37179147922731E-07+7.89795894315015E-06i","-0.000180140019528682+0.000134774324839002i","0.0191185086575287-0.0295396595427583i",-29.07241168831969,-57.088452961179001,"-10.0902956359365i",20.078077816660826,-90,-8.9943338716588634,32.911547038820999]
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[15,94.247779607693786,"5.37179147922731E-07+9.11302954978866E-06i","-0.000239831386946471+0.000155508836352695i","0.0157685582317277-0.0277731763678607i",-29.914012102046289,-60.413729772931077,"-8.74492288447831i",18.835119681683949,-90,-11.07889242036234,29.586270227068923]
[16,100.53096491487338,"5.37179147922731E-07+9.72056485310789E-06i","-0.000272874822481318+0.000165876092109541i","0.0143742955449213-0.0268849020755332i",-30.317887656658002,-61.868343588425596,"-8.19836520419843i",18.27454520967909,-90,-12.043342446978912,28.131656411574397]
[17,106.81415022205297,"5.37179147922731E-07+0.0000103281001564271i","-0.0003080500925668+0.000176243347866387i","0.0131377090362653-0.0260109200611381i",-30.71006706858277,-63.202372988640221,"-7.7161084274809i",17.747966435232136,-90,-12.962100633350634,26.797627011359793,{"$f":"A18","v":17},-9.4789999999999992,30.9]
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[19,119.38052083641213,"5.37179147922731E-07+0.0000115431707630656i","-0.000384796136389671+0.00019697785938008i","0.0110615022648673-0.0243357425915556i",-31.459459829491394,-65.556433347869358,"-6.90388648774604i",16.781872843740999,-90,-14.677586985750395,24.443566652130642]
[20,125.66370614359172,"5.37179147922731E-07+0.0000121507060663849i","-0.000426366910127059+0.000207345115136926i","0.0101892811049715-0.0235431225174597i",-31.817080647818322,-66.597412724918968,"-6.55869216335873i",16.336344949517944,-90,-15.480735698300379,23.402587275081032]
[21,131.94689145077132,"5.37179147922731E-07+0.0000127582413697041i","-0.000470069518415084+0.000217712370893773i","0.00940929172586183-0.0227832729842708i",-32.163734441816601,-67.559804441717077,"-6.24637348891306i",15.912558968119161,-90,-16.25117547369744,22.440195558282937]
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[23,144.51326206513048,"5.37179147922731E-07+0.0000139733119763426i","-0.000563870238643036+0.000238446882407465i","0.00808148429721134-0.021363615979161i",-32.825671126252679,-69.27924147364206,"-5.70321057683369i",15.122388142445729,-90,-17.70328298380695,20.72075852635794]
[24,150.79644737231007,"5.37179147922731E-07+0.0000145808472796618i","-0.000613968350582968+0.000248814138164312i","0.00751507949700954-0.0207030040543749i",-33.141769648520587,-70.049374161571819,"-5.46557680279895i",14.752720028565459,-90,-18.389049619955127,19.950625838428181]
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[26,163.36281798666926,"5.37179147922731E-07+0.0000157959178863003i","-0.000720560078114731+0.000269548649678004i","0.00653985216384579-0.0194752804001549i",-33.746297022009664,-71.437808672566547,"-5.04514781796825i",14.057477903381201,-90,-19.688819118628462,18.562191327433453]
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[31,194.77874452256717,"5.37179147922731E-07+0.0000188335944028966i","-0.00102434650158026+0.000321384928462236i","0.00477416259387537-0.0168880847179244i",-35.114492356812676,-74.214713246908914,"-4.23141429894113i",12.529710986112141,-90,-22.584781370700533,15.7852867530911]
[32,201.06192982974676,"5.37179147922731E-07+0.0000194411297062158i","-0.00109149928992527+0.000331752184219082i","0.00450527929408357-0.016442056926226i",-35.366464419190947,-74.676525121451803,"-4.09918260209922i",12.253945296399477,-90,-23.112519122791468,15.323474878548211]
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[45,282.74333882308139,"5.37179147922731E-07+0.0000273390886493659i","-0.00215848248251824+0.000466526509058084i","0.00237761867621087-0.0121519941537261i",-38.143897671537708,-78.929549466366723,"-2.9149742948261i",9.2926945872906881,-90,-28.851203084247018,11.070450533633277]
[46,289.02652413026095,"5.37179147922731E-07+0.0000279466239526852i","-0.00225548095457215+0.000476893764814931i","0.00227974320182995-0.0119085149355421i",-38.326532493369697,-79.162529022666817,"-2.85160528841685i",9.1017882291661198,-90,-29.224744264203579,10.837470977333169]
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{"sheet":"Revision History","index":3,"n_rows":5,"n_cols":5,"rows_kept":5,"cut":false,"hidden":false,"merged":[]}
[]
[null,"TI Literature Number","Version Suffix","Release Date"," Changes Made"]
[null,"SLUC114",2,"Mar 2025"," 1.  Revised method for inductance calculation; corrected \"fcv\" equation (cell D223); revised various equations for user-selected values instead of calculated target values.  \n 2.  Revised various equations to remove arbitrary design-margin terms.\n 3.  Added additional useful calculation results.  \n 4.  Revised overall format to separate system-level inputs from controller-level inputs, and to group controller functions.\n 5.  Added extensive help comments and error-checking.\n 6.  Equations and text are locked but not hidden.\n 7.  Added 'Revision History' and 'Notice and Disclaimer' sheets.\n 8.  New revision suffix format implemented."]
[null,"SLUC114","A","Nov 2018","     (Changes made since initial release are not documented.)"]
[null,"SLUC114","-","Aug 2008","      Initial release."]

{"sheet":"Notice and Disclaimer","index":4,"n_rows":4,"n_cols":2,"rows_kept":4,"cut":false,"hidden":false,"merged":[[1,1,2,21],[3,1,3,21]]}
[]
[null,"Important Notice and Disclaimer"]
[]
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